EVAL6472PD STMicroelectronics, EVAL6472PD Datasheet - Page 20

• Manufacturer Part Number: EVAL6472PD
• Description: Power Management IC Development Tools L6472PD 7.0A w/SPI dSPIN 8 to 45V EVAL
• Manufacturer: STMicroelectronics
• Type: Motor / Motion Controllers & Driversr

Specifications of EVAL6472PD

• Product Category: Power Management IC Development Tools
• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: L6472PD
• Input Voltage: 8 V to 45 V
• Output Voltage: 8 V to 45 V
• Interface Type: SPI
• Output Current: 7 A
• For Use With: L6472

Functional description
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6.1
6.2
6.3
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Functional description
Device power-up
At the end of power-up, the device state is the following:
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●
●
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During power-up the device is under reset (all logic IO disabled and power bridges in high-
impedance state) until the following conditions are satisfied:
●
●
●
Any motion command causes the device to exit from High Z state (HardStop and SoftStop
included).
Logic I/O
Pins CS, CK, SDI, STCK, SW and STBY\RST are TTL/CMOS 3.3 V-5 V compatible logic
inputs.
Pin SDO is a TTL/CMOS compatible logic output. The VDD pin voltage sets the logic output
pin voltage range; when it is connected to VREG or a 3.3 V external supply voltage, the
output is 3.3 V compatible. When VDD is connected to a 5 V supply voltage, SDO is 5 V
compatible.
VDD is not internally connected to V
A 10 µF capacitor should be connected to the VDD pin in order to obtain a proper operation.
Pins FLAG and BUSY\SYNC are open drain outputs.
Charge pump
To ensure the correct driving of the high-side integrated MOSFETs, a voltage higher than
the motor power supply voltage needs to be applied to the Vboot pin. The high-side gate
driver supply voltage Vboot is obtained through an oscillator and a few external components
realizing a charge pump (see
Registers are set to default,
Internal logic is driven by the internal oscillator and a 2 MHz clock is provided by the
OSCOUT pin,
Bridges are disabled (High Z),
UVLO bit in the STATUS register is forced low (fail condition),
FLAG output is forced low.
V
V
Internal oscillator is operative.
S
REG
is greater than V
is greater than V
SthOn
REGth
Doc ID 022729 Rev 2
Figure
= 2.8 V (typ.)
REG
5).
, an external connection is always needed.
L6472