IS61NLF25618A-7.5TQLI ISSI, Integrated Silicon Solution Inc, IS61NLF25618A-7.5TQLI Datasheet
IS61NLF25618A-7.5TQLI
Specifications of IS61NLF25618A-7.5TQLI
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IS61NLF25618A-7.5TQLI Summary of contents
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 128K x 36 and 256K x 18 4Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single Read/Write control pin • ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A BLOCK DIAGRAM ADDRESS x 36: A [0:16] or REGISTER x 18: A [0:17] CLK CONTROL LOGIC K CKE CE CE2 CE2 CONTROL } ADV REGISTER WE BWŸ X (X= a- DQx/DQPx 2 A2-A16 or A2-A17 MODE BURST ADDRESS A0-A1 A'0-A'1 COUNTER WRITE WRITE ADDRESS ADDRESS REGISTER REGISTER CONTROL LOGIC Integrated Silicon Solution, Inc. — ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A Bottom View 119-Ball BGA Integrated Silicon Solution, Inc. — www.issi.com Rev. C 05/28/08 Bottom View 165-Ball 15mm BGA 3 ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A PIN CONFIGURATION — 128K CE2 C DQPc NC V DDQ D DQc DQc V DDQ E DQc DQc V DDQ F DQc DQc V DDQ G DQc DQc V DDQ DQd DQd V DDQ K DQd DQd V DDQ L DQd DQd V DDQ M DQd DQd V DDQ N DQPd NC V DDQ MODE NC A Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 119-PIN PBGA PACKAGE CONFIGURATION DDQ B NC CE2 C NC DQc DQPc D DQc DQc E V DQc F DDQ DQc DQc G H DQc DQc DDQ K DQd DQd L DQd DQd V DQd M DDQ DQd DQd N DQd DQPd DDQ Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 165-PIN PBGA PACKAGE CONFIGURATION CE2 DDQ DQb DDQ V DQb E NC DDQ V DDQ F NC DQb V DDQ G NC DQb DDQ DQb DQb DDQ DQb DDQ V M DQb NC DDQ NC N DQPb V DDQ MODE Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 119-PIN PBGA PACKAGE CONFIGURATION DDQ B NC CE2 NC C DQb D DQb DDQ NC DQb G H DQb DDQ K DQb NC L DQb V DQb M DDQ DQb N NC DQPb DDQ Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A PIN CONFIGURATION 100-Pin TQFP 100 DQPc 1 2 DQc 3 DQc 4 V DDQ 5 Vss 6 DQc 7 DQc 8 DQc 9 DQc 10 Vss 11 V DDQ 12 DQc 13 DQc Vss 18 DQd 19 DQd 20 V DDQ 21 Vss 22 DQd 23 DQd 24 DQd 25 DQd Vss DDQ 28 DQd DQd 29 DQPd 128K x 36 PIN DESCRIPTIONS A0, A1 Synchronous Address Inputs ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A STATE DIAGRAM BEGIN READ READ READ BURST BURST BURST READ SYNCHRONOUS TRUTH TABLE Address Operation Used Not Selected N/A Not Selected N/A Not Selected N/A Not Selected Continue N/A Begin Burst Read External Address Continue Burst Read Next Address ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A ASYNCHRONOUS TRUTH TABLE Operation ZZ Sleep Mode H L Read L Write L Deselected L Notes means "Don't Care". 2. For write cycles following read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur. 3. Sleep Mode means power Sleep Mode where stand-by current does not depend on cycle time. ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A WRITE TRUTH TABLE (x36 Operation READ H WRITE BYTE a L WRITE BYTE b L WRITE BYTE c L WRITE BYTE d L WRITE ALL BYTEs L WRITE ABORT/NOP L Notes : 1. X means "Don't Care". 2. All inputs in this table must beet setup and hold time around the rising edge of CLK. ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A LINEAR BURST ADDRESS TABLE A1', A0' = 1,1 ABSOLUTE MAXIMUM RATINGS Symbol Parameter T Storage Temperature STG P Power Dissipation D I Output Current (per I/O) OUT Voltage Relative OUT V Voltage Relative for Address and Control Inputs Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A OPERATING RANGE (IS61NVFx) Range Ambient Temperature Commercial 0°C to +70°C Industrial -40°C to +85°C DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions V Output HIGH Voltage Output LOW Voltage Input HIGH Voltage IH V Input LOW Voltage IL I Input Leakage Current Output Leakage Current ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A CAPACITANCE (1,2) Symbol Parameter C Input Capacitance IN C Input/Output Capacitance OUT Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions 25° MHz 3.3V I/O AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 2.5V I/O AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load See Figures 3 and 4 2.5V I/O OUTPUT LOAD EQUIVALENT Z = 50Ω O OUTPUT Figure 3 Integrated Silicon Solution, Inc. — www.issi.com Rev ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A READ/WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter fmax Clock Frequency t Cycle Time KC t Clock High Time KH t Clock Low Time KL t Clock Access Time KQ (2) t Clock High to Output Invalid KQX (2,3) t Clock High to Output Low-Z KQLZ (2,3) t Clock High to Output High-Z ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A SLEEP MODE ELECTRICAL CHARACTERISTICS Symbol Parameter I Current during SLEEP MODE active to input ignored PDS t ZZ inactive to input sampled PUS t ZZ active to SLEEP current ZZI t ZZ inactive to exit SLEEP current RZZI SLEEP MODE TIMING CLK t PDS ZZ setup cycle ZZ t ZZI ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A READ CYCLE TIMING CLK t t ADVS ADVH ADV Address WRITE t SE CKE t t CES CEH OEQ OEHZ t OEHZ Data Out Q1-1 NOTES: WRITE = L means and BWx = and BWX = means CE1 = L, CE2 = H and CE2 = means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A WRITE CYCLE TIMING t KH CLK t KC ADV Address A1 A2 WRITE CKE CE OE Data In D1-1 t OEHZ Data Out Q0-4 NOTES: WRITE = L means and BWx = and BWX = means CE1 = L, CE2 = H and CE2 = means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L Integrated Silicon Solution, Inc. — ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A SINGLE READ/WRITE CYCLE TIMING CLK CKE Address WRITE CE ADV OE t OEQ t OELZ Data Out Data In D2 NOTES: WRITE = L means and BWx = means CE1 = L, CE2 = H and CE2 = means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = Integrated Silicon Solution, Inc. — www.issi.com ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A CKE CKE CKE CKE CKE OPERATION TIMING CLK CKE Address A1 A2 WRITE CE ADV KQLZ Data Out Q1 Data In NOTES: WRITE = L means and BWx = means CE1 = L, CE2 = H and CE2 = means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L Integrated Silicon Solution, Inc. — www.issi.com Rev ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A OPERATION TIMING CLK CKE A1 A2 Address WRITE CE ADV OEQ t OELZ Q1 Q2 Data Out Data In NOTES: WRITE = L means and BWx = means CE1 = L, CE2 = H and CE2 = means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = KQHZ KQ t KQLZ Integrated Silicon Solution, Inc. — www.issi.com ...
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... Order Part Number 128Kx36 IS61NLF12836A-6.5TQI IS61NLF12836A-6.5B2I IS61NLF12836A-6.5B3I IS61NLF12836A-7.5TQI IS61NLF12836A-7.5TQLI IS61NLF12836A-7.5B2I IS61NLF12836A-7.5B3I IS61NLF12836A-7.5B3LI 256Kx18 IS61NLF25618A-6.5TQI IS61NLF25618A-6.5B2I IS61NLF25618A-6.5B3I IS61NLF25618A-7.5TQI IS61NLF25618A-7.5TQLI IS61NLF25618A-7.5B2I IS61NLF25618A-7.5B3I Package 100 TQFP 119 PBGA 165 PBGA 100 TQFP 119 PBGA 165 PBGA 100 TQFP 119 PBGA 165 PBGA 100 TQFP 119 PBGA ...
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... IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A ORDERING INFORMATION (V Commercial Range: 0°C to +70°C Access Time 6.5 7.5 6.5 7.5 Industrial Range: -40°C to +85°C Access Time 6.5 7.5 6.5 7 2.5V/V = 2.5V) DD DDQ Order Part Number 128Kx36 IS61NVF12836A-6.5TQ IS61NVF12836A-6.5B2 IS61NVF12836A-6.5B3 IS61NVF12836A-7.5TQ IS61NVF12836A-7.5B2 IS61NVF12836A-7.5B3 256Kx18 IS61NVF25618A-6.5TQ IS61NVF25618A-6.5B2 IS61NVF25618A-6 ...
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PACKAGING INFORMATION Plastic Ball Grid Array Package Code: B (119-pin MILLIMETERS Sym. Min. Max. N0. Leads 119 A — 2.41 A1 0.50 0.70 A2 0.80 1.00 A3 1.30 1.70 A4 0.56 BSC b 0.60 0.90 D 21.80 ...
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PACKAGING INFORMATION Ball Grid Array Package Code: B (165-pin) TOP VIEW A1 CORNER BGA - 13mm ...
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PACKAGING INFORMATION TQFP (Thin Quad Flat Pack Package) Package Code Thin Quad Flat Pack (TQ) Millimeters Inches Symbol Min Max Min Ref. Std. No. Leads (N) 100 A — 1.60 — A1 0.05 0.15 ...