M25PE16-VMW6TG NUMONYX, M25PE16-VMW6TG Datasheet - Page 42
![IC FLASH 16MBIT 75MHZ 8SOIC](/photos/7/28/72835/m25pe16-vmw6tg_sml.jpg)
M25PE16-VMW6TG
Manufacturer Part Number
M25PE16-VMW6TG
Description
IC FLASH 16MBIT 75MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet
1.M45PE16-VMP6TG.pdf
(58 pages)
Specifications of M25PE16-VMW6TG
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (2M x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Package
8SOIC W
Cell Type
NOR
Density
16 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 32
Timing Type
Synchronous
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M25PE16-VMW6TGTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25PE16-VMW6TG
Manufacturer:
MAXIM
Quantity:
14 500
Company:
Part Number:
M25PE16-VMW6TG
Manufacturer:
Numonyx
Quantity:
15 000
Part Number:
M25PE16-VMW6TG
Manufacturer:
ST
Quantity:
20 000
Instructions
6.17
42/58
Release from deep power-down (RDP)
Once the device has entered the deep power-down mode, all instructions are ignored
except the release from deep power-down (RDP) instruction. Executing this instruction
takes the device out of the deep power-down mode.
The release from deep power-down (RDP) instruction is entered by driving Chip Select (S)
Low, followed by the instruction code on serial data input (D). Chip Select (S) must be driven
Low for the entire duration of the sequence.
The instruction sequence is shown in
The release from deep power-down (RDP) instruction is terminated by driving Chip Select
(S) High. Sending additional clock cycles on Serial Clock (C), while Chip Select (S) is driven
Low, cause the instruction to be rejected, and not executed.
After Chip Select (S) has been driven High, followed by a delay, t
standby mode. Chip Select (S) must remain High at least until this period is over. The device
waits to be selected, so that it can receive, decode and execute instructions.
Any release from deep power-down (RDP) instruction, while an erase, program or write
cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure 22. Release from deep power-down (RDP) instruction sequence
S
C
D
Q
High Impedance
0
1
2
Instruction
3
4
5
6
Figure
7
22.
Deep power-down mode
t
RDP
RDP
, the device is put in the
Standby mode
M25PE16
AI06807