M45PE80-VMP6TG NUMONYX, M45PE80-VMP6TG Datasheet - Page 37

• Manufacturer Part Number: M45PE80-VMP6TG
• Description: IC FLASH 8MBIT 50MHZ 8VFQFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M45PE80-VMP6TG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 50MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VFQFN, 8-VFQFPN
• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 12ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VFQFPN
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1M
• Supply Current: 4mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M45PE80-VMP6TG; M45PE80-VMP6TGTR

Table 13.
1. t
2. Value guaranteed by characterization, not 100% tested in production.
3. n = number of bytes to program. int(A) corresponds to the upper integer part of A. Examples: int(1/8) = 1, int(16/8) = 2,
Symbol
t
t
SHQZ
t
RLRH
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RDP
t
t
t
DVCH
CHDX
CHSH
SHCH
WHSL
SHWL
SHRH
PW
CLQV
CLQX
CH
SLCH
CHSL
SHSL
DP
RHSL
PP
CL
int(17/8) = 3.
t
t
CH
f
f
PE
SE
C
R
(1)
(1)
(2)
(3)
(3)
(2)
(2)
(2)
+ t
CL
must be greater than or equal to 1/ f
t
t
t
t
t
t
t
Alt.
t
DSU
t
CSH
t
REC
CLH
CSS
RST
CLL
DIS
HO
f
DH
t
AC characteristics (50 MHz operation)
C
V
Clock frequency for the following instructions:
FAST_READ, PW, PP, PE, SE, DP, RDP,
WREN, WRDI, RDSR, RDID
Clock frequency for READ instructions
Clock High time
Clock Low time
Clock slew rate
S active setup time (relative to C)
S not active hold time (relative to C)
Data in setup time
Data in hold time
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
Output disable time
Clock Low to Output Valid
Output hold time
Write Protect setup time
Write Protect hold time
S to Deep Power-down
S High to Standby mode
Reset pulse width
Reset recovery time
Chip should have been deselected before
Reset is de-asserted
Page Write cycle time (256 bytes)
Page Program cycle time (256 bytes)
Page Program cycle time (n bytes)
Page Erase cycle time
Sector Erase cycle time
Test conditions specified in
(2)
Parameter
(peak to peak)
C
Table 8
Min.
D.C.
D.C.
100
100
0.1
50
9
9
5
5
2
5
5
5
0
and
Table 9
int(n/8) × 0.025
Typ.
0.8
10
11
1
Max.
50
33
30
10
10
23
20
8
8
3
3
3
5
MHz
MHz
V/ns
Unit
37/48
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
μs
μs
ns
s