M25P32-VMF6P NUMONYX, M25P32-VMF6P Datasheet - Page 32
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M25P32-VMF6P
Manufacturer Part Number
M25P32-VMF6P
Description
IC FLASH 32MBIT 75MHZ 16SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet
1.M25P32-VME6G.pdf
(54 pages)
Specifications of M25P32-VMF6P
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (4M x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC
Package
16SO W
Cell Type
NOR
Density
32 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 64
Timing Type
Synchronous
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-3597
497-3597
497-3597
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25P32-VMF6P,M25P32-VMF6TP
Quantity:
5 000
Company:
Part Number:
M25P32-VMF6PB
Manufacturer:
INTEL
Quantity:
10 000
6.10
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Bulk Erase (BE)
The Bulk Erase (BE) instruction sets all bits to 1 (FFh). Before it can be accepted, a Write
Enable (WREN) instruction must previously have been executed. After the Write Enable
(WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL).
The Bulk Erase (BE) instruction is entered by driving Chip Select (S) Low, followed by the
instruction code on Serial Data Input (D). Chip Select (S) must be driven Low for the entire
duration of the sequence.
The instruction sequence is shown in
Chip Select (S) must be driven High after the eighth bit of the instruction code has been
latched in, otherwise the Bulk Erase instruction is not executed. As soon as Chip Select (S)
is driven High, the self-timed Bulk Erase cycle (whose duration is t
Bulk Erase cycle is in progress, the Status Register may be read to check the value of the
Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Bulk
Erase cycle, and is 0 when it is completed. At some unspecified time before the cycle is
completed, the Write Enable Latch (WEL) bit is reset.
The Bulk Erase (BE) instruction is executed only if all Block Protect (BP2, BP1, BP0) bits
are 0. The Bulk Erase (BE) instruction is ignored if one, or more, sectors are protected.
Figure 17. Bulk Erase (BE) instruction sequence
S
C
D
Figure
0
1
2
17.
Instruction
3
4
5
6
7
BE
AI03752D
) is initiated. While the