N25Q128A13BF840F NUMONYX, N25Q128A13BF840F Datasheet - Page 28

• Manufacturer Part Number: N25Q128A13BF840F
• Description: IC SRL FLASH 128MB NMX 8-VDFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of N25Q128A13BF840F

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16M x 8)
• Speed: 108MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating features
5.2.8
5.3
5.3.1
5.3.2
5.3.3
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HOLD (or Reset) condition
The HOLD (or Reset i.e. for parts having the reset functionality instead of hold pin) signal
has exactly the same behavior in DIO-SPI protocol as do in Extended SPI protocol, so
please refer to section 5.1.10, Hold (or Reset) condition” in the Extend SPI protocol section
for further details.
Quad SPI (QIO-SPI)Protocol
In the Quad SPI (QIO-SPI) protocol all the Instructions, addresses and I/O data are
transmitted on four data lines, with the exception of the polling instructions performed during
a Program or Erase cycle performed with VPP, in this case the device temporarily goes in
Extended SPI protocol. The protocol again becomes QIO-SPI as soon as the VPP voltage
goes low.
All the functionality available in the Extended SPI protocol are also available in the QIO-SPI
mode, with equivalent instruction transmitted on the 4 data lines DQ0, DQ1, DQ2 and DQ3.
The exceptions are the READ, Dual Read and Dual Program instructions, that are not
available in QIO-SPI protocol, and the RDID instruction, that is replaced in the QIO-SPI
protocol by the Multiple I/O Read Identification (MIORDID) instruction. The Multiple I/O
Read Instruction reads just the standard SPI electronic ID (3 bytes), while with the Extended
SPI protocol RDID instruction is possible to access also the UID bytes.
To help the application code port from Extended SPI to QIO-SPI protocol, the instructions
available in the QIO-SPI protocol have the same operation code as in the Extended SPI
protocol, the only exception is the MIORDID instruction.
Multiple I/O Read Identification
The Multiple I/O Read Identification (MIORDID) instruction is available to read the device
electronic ID. With respect to the RDID instruction of the Extended SPI protocol, the output
data, shifted out on the 4 data lines DQ0, DQ1, DQ2 and DQ3.
Since in the QIO-SPI protocol the Read ID instruction is limited to 3 bytes of the standard
electronic ID, the UID bytes are not read with the MIORDID instruction.
Quad Command Fast reading
The Array Data can be read by the Quad Command Fast Read instruction using 3
instructions (EBh, 6Bh and 0Bh) to help the application code port from Extended SPI
protocol to DIO-SPI protocol. The instruction, address and output data are transmitted
across 4 data lines.
The Dual and Single I/O Read instructions are not available in QIO-SPI protocol.
QUAD Command Page programming
The memory can be programmed in QIO-SPI protocol by the Quad Command Page
Program instruction using (02h, 12h and 32h). The instruction, address and input data are
transmitted across 4 data lines
The Dual and Single I/O Program instructions are not available in QIO-SPI protocol
Programming the memory by multiplexing the instruction, the addresses and the output data
on 4 wires can be achieved in QIO-SPI protocol by mean of the Quad Command Page
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2010 Micron Technology, Inc. All rights reserved.
N25Q128 - 3 V