PSD813F2A-90M STMicroelectronics, PSD813F2A-90M Datasheet - Page 68
![IC FLASH 1MBIT 90NS 52QFP](/photos/7/25/72513/497-52-pqfp_series_sml.jpg)
PSD813F2A-90M
Manufacturer Part Number
PSD813F2A-90M
Description
IC FLASH 1MBIT 90NS 52QFP
Manufacturer
STMicroelectronics
Datasheet
1.PSD813F2VA-20JI.pdf
(109 pages)
Specifications of PSD813F2A-90M
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
1M (128K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
52-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1990
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PSD813F2V, PSD854F2V
Table 33. Status During Power-On Reset, Warm Reset and Power-down Mode
Note: 1. The SR_cod and PeriphMode bits in the VM Register are always cleared to '0' on Power-On Reset or Warm Reset.
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MCU I/O
PLD Output
Address Out
Data Port
Peripheral I/O
PMMR0 and PMMR2
Macrocells flip-flop status
VM Register
All other registers
Port Configuration
Register
1
Valid after internal PSD
configuration bits are
loaded
Tri-stated
Tri-stated
Cleared to '0' by internal
Power-On Reset
Initialized, based on the
selection in PSDsoft
Configuration menu
Cleared to '0'
Input mode
Tri-stated
Cleared to '0'
Power-On Reset
Power-On Reset
Doc ID 10552 Rev 3
Valid
Tri-stated
Depends on .re and .pr
equations
Initialized, based on the
selection in PSDsoft
Configuration menu
Input mode
Tri-stated
Tri-stated
Unchanged
Cleared to '0'
Warm Reset
Warm Reset
Unchanged
Depends on inputs to PLD
(addresses are blocked in
PD mode)
Not defined
Tri-stated
Tri-stated
Unchanged
Depends on .re and .pr
equations
Unchanged
Unchanged
Power-down Mode
Power-down Mode