AT24C1024-10CI-2.7 Atmel, AT24C1024-10CI-2.7 Datasheet - Page 6

IC EEPROM 1MBIT 1MHZ 8LAP

AT24C1024-10CI-2.7

Manufacturer Part Number
AT24C1024-10CI-2.7
Description
IC EEPROM 1MBIT 1MHZ 8LAP
Manufacturer
Atmel
Datasheet

Specifications of AT24C1024-10CI-2.7

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1M (128K x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-LAP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT24C1024-10CI2.7
Device
Operation
6
AT24C1024
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external
device. Data on the SDA pin may change only during SCL low time periods (refer to Data
Validity timing diagram). Data changes during SCL high periods will indicate a start or stop
condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (refer to Start and Stop Definition timing diagram).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a
read sequence, the Stop command will place the EEPROM in a standby power mode (refer to
Start and Stop Definition timing diagram).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the
EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl-
edge that it has received each word.
STANDBY MODE: The AT24C1024 features a low-power standby mode which is enabled: a)
upon power-up and b) after the receipt of the STOP bit and the completion of any internal
operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any 2-wire
part can be reset by following these steps:
1. Clock up to 9 cycles,
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition.
1471H–SEEPR–03/03

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