IS61LV256-15TL ISSI, Integrated Silicon Solution Inc, IS61LV256-15TL Datasheet - Page 8

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IS61LV256-15TL

Manufacturer Part Number
IS61LV256-15TL
Description
IC SRAM 256KBIT 15NS 28TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61LV256-15TL

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
256K (32K x 8)
Speed
15ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
IS62LV256
WRITE CYCLE NO. 2 (CE
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but
2. I/O will assume the High-Z state if OE • V
8
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of
the signal that terminates the Write.
ADDRESS
ADDRESS
D
D
OUT
WE
OUT
D
WE
D
CE
CE
IN
IN
CE
CE
CE Controlled)
CE
WE
WE
WE
WE Controlled)
DATA UNDEFINED
t
t
SA
DATA UNDEFINED
SA
IH
.
(1,2)
Integrated Silicon Solution, Inc. — www.issi.com —
t
HZWE
(1,2)
t
AW
t
HZWE
t
AW
t
t
t
SCE
PWE
SCE
t
t
WC
WC
t
PWE
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA-IN VALID
DATA-IN VALID
t
t
HA
HA
t
t
t
t
HD
LZWE
LZWE
HD
ISSI
1-800-379-4774
12/11/02
Rev. K
®

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