CY7C1352F-100AC Cypress Semiconductor Corp, CY7C1352F-100AC Datasheet
CY7C1352F-100AC
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CY7C1352F-100AC Summary of contents
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... Cypress Semiconductor Corporation Document #: 38-05211 Rev. *C 4-Mbit (256Kx18) Pipelined SRAM Functional Description The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consec- utive Read/Write operations with data being transferred on every clock cycle ...
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... V 11 DDQ BYTE DDQ DQP DDQ Document #: 38-05211 Rev. *C 250 MHz 225 MHz 200 MHz 2.6 2.6 2.8 325 290 265 100-Pin TQFP CY7C1352F CY7C1352F 166 MHz 133 MHz 100 MHz 3.5 4.0 4.5 240 225 205 DDQ DQP DDQ DDQ ...
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... Mode Input. Selects the burst order of the device. When tied to Gnd selects linear burst sequence. When tied to V selects interleaved burst sequence. Power supply inputs to the core of the device. Power supply for the I/O circuitry. CY7C1352F Description are fed to the two-bit burst counter. [1:0] to select/deselect the device. ...
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... Burst Read Accesses The CY7C1352F has an on-chip burst counter that allows the user the ability to supply a single address and conduct up to four Reads without reasserting the address inputs. ADV/LD must be driven LOW in order to load a new address into the SRAM, as described in the Single Read Access section above ...
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... Byte write capability has been included in order to greatly simplify Read/Modify/Write sequences, which can be reduced to simple byte write operations. Because the CY7C1352F is a common I/O device, data should not be driven into the device while the outputs are active. The Output Enable (OE) can be deasserted HIGH before presenting data to the DQs and DQP three-state the output drivers ...
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... ZZ active to snooze current ZZI t ZZ inactive to exit snooze current RZZI Document #: 38-05211 Rev ADV/ Test Conditions − 0.2V ZZ > − 0.2V ZZ > < 0.2V This parameter is sampled This parameter is sampled CY7C1352F OE CEN CLK L-H three-state L-H – three-state Min. Max CYC 2t CYC 2t CYC 0 Page ...
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... MHz DD OUT 1/t MAX CYC 4.4-ns cycle, 225 MHz 5-ns cycle, 200 MHz 6-ns cycle, 166 MHz 7.5-ns cycle, 133 MHz 10-ns cycle, 100MHz CY7C1352F Ambient Temperature ( 0°C to +70°C 3.3V – 5%/+10% 2.5V –5% –40°C to +85°C Min. Max. ...
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... Max, Device Deselected, All speeds DD ≥ V ≤ Test Conditions Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA / JESD51. Test Conditions T = 25° MHz 3.3V 3.3V DDQ CY7C1352F Min. Max. Unit 120 mA 115 mA 110 mA 100 105 mA 100 ...
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... SRAMs when sharing the same OELZ CHZ CLZ = 3.3V and is 1.25V when V = 2.5V. DDQ CY7C1352F ALL INPUT PULSES V DD 90% 10% GND ≤ 1ns (c) ALL INPUT PULSES V DD 90% ...
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... D(A2+1) BURST READ READ BURST WRITE Q(A3) Q(A4) READ D(A2+1) Q(A4+1) DON’T CARE UNDEFINED is LOW. When CE is HIGH HIGH CY7C1352F (continued) 200 MHz 166 MHz 133 MHz 1.2 1.5 1.5 1.2 1.5 1.5 1.2 1.5 1.5 1.2 1.5 1.5 1.2 1 ...
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... DQs are in high-Z when exiting ZZ sleep mode. Document #: 38-05211 Rev. *C [18, 19, 21 D(A1) Q(A2) STALL READ WRITE STALL Q(A3) D(A4) DON’T CARE UNDEFINED ZZI I DDZZ CY7C1352F D(A4) Q(A3) NOP READ DESELECT Q(A5) t ZZREC t RZZI DESELECT or READ Only 10 t CHZ Q(A5) CONTINUE DESELECT Page ...
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... CY7C1352F-166AI 133 CY7C1352F-133AC CY7C1352F-133AI 100 CY7C1352F-100AC CY7C1352F-100AI Shaded areas contain advance information. Please contact your local cypress sales representative to order parts that are not listed in the ordering information table. Package Diagram 100-Pin Thin Plastic Quad Flatpack ( 1.4 mm) A101 ZBT is a trademark of Integrated Device Technology. NoBL and No Bus Latency are trademarks of Cypress Semiconductor. All product and company names mentioned in this document are trademarks of their respective holders ...
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... Document History Page Document Title: CY7C1352F 4-Mbit (256Kx18) Pipelined SRAM with NoBL™ Architecture Document #: 38-05211 Rev. *C REV. ECN NO. Issue Date ** 119826 12/16/02 *A 123116 01/18/03 *B 200662 See ECN *C 225487 See ECN Document #: 38-05211 Rev. *C Orig. of Change HGK New Data Sheet RBI ...