CY7C141-25JXC Cypress Semiconductor Corp, CY7C141-25JXC Datasheet - Page 9

• Manufacturer Part Number: CY7C141-25JXC
• Description: IC SRAM 8KBIT 25NS 52PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C141-25JXC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 8K (1K x 8)
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 52-PLCC
• Density: 8Kb
• Access Time (max): 25ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 10b
• Package Type: PLCC
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 170mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 52
• Word Size: 8b
• Number Of Words: 1K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Notes
Document #: 38-06002 Rev. *E
20. R/W is HIGH for read cycle.
21. Device is continuously selected, CE = V
22. Address valid prior to or coincident with CE transition LOW.
DATA OUT
DATA OUT
ADDRESS
ADDRESS
ADDRESS
I
OE
I
DOUT
CE
BUSY
CC
SB
R/W
D
INR
R
L
L
R
L
PREVIOUS DATA VALID
t
PU
t
LZCE
t
OHA
IL
t
LZOE
and OE = V
Read with BUSY, Master: CY7C130 and CY7C131
t
t
PS
ACE
IL
.
Figure 5. Read Cycle No. 1
Figure 6. Read Cycle No. 2
Figure 7. Read Cycle No. 3
t
Either Port CE/OE Access
DOE
Either Port Address Access
t
BLA
t
ADDRESS MATCH
AA
t
RC
t
RC
t
PWE
ADDRESS MATCH
DATA VALID
[20, 21]
[20, 22]
[21]
t
WDD
VALID
t
HZOE
t
DDD
DATA VALID
t
BHA
t
CY7C130, CY7C130A
CY7C131, CY7C131A
HD
CY7C140, CY7C141
t
HZCE
t
PD
t
BDD
VALID
Page 9 of 19
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