CY7C0251-25AXC Cypress Semiconductor Corp, CY7C0251-25AXC Datasheet - Page 9
![IC SRAM 144KBIT 25NS 100LQFP](/photos/6/70/67051/428-100-tqfp_14x14x1_4_sml.jpg)
CY7C0251-25AXC
Manufacturer Part Number
CY7C0251-25AXC
Description
IC SRAM 144KBIT 25NS 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C024-55AXC.pdf
(21 pages)
Specifications of CY7C0251-25AXC
Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
144K (8K x 18)
Speed
25ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C0251-25AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Characteristics
Document #: 38-06035 Rev. *D
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
ABE
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
WDD
DDD
14. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I
15. To access RAM, CE=L, UB=L, SEM=H. To access semaphore, CE=H and SEM=L. Either condition must be valid for the entire t
16. At any given temperature and voltage condition for any given device, t
17. Test conditions used are Load 3.
18. This parameter is guaranteed but not tested.
19. For information on port-to-port delay through RAM cells from writing port to reading port, refer to
Parameter
Read Cycle
Write Cycle
[18]
[18]
[15]
and 30 pF load capacitance.
[15]
[15]
[15]
[19]
[19]
[16, 17, 18]
[16, 17, 18]
[16, 17, 18]
[16, 17, 18]
[17, 18]
[17, 18]
Read Cycle Time
Address to Data Valid
Output Hold From Address
Change
CE LOW to Data Valid
OE LOW to Data Valid
OE Low to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power Up
CE HIGH to Power Down
Byte Enable Access Time
Write Cycle Time
CE LOW to Write End
Address Setup to Write End
Address Hold From Write End
Address Setup to Write Start
Write Pulse Width
Data Setup to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read
Data Valid
Description
Over the Operating Range
7C024/024A/0241–15
Min
7C025/0251–15
15
15
12
12
12
10
3
0
0
3
3
0
0
0
Max
HZCE
15
15
10
10
10
15
15
10
30
25
is less than t
[14]
7C024/024A/0241–25
Min
7C025/0251–25
25
25
20
20
20
15
3
3
3
0
0
0
0
0
LZCE
and t
Max
25
25
13
15
15
25
25
15
50
35
HZOE
Figure
is less than t
11.
7C024/024A/0241–35
Min
7C025/0251–35
35
35
30
30
25
15
3
3
3
0
0
0
0
0
LZOE
.
CY7C024/024A/0241
Max
20
60
35
35
20
20
25
35
20
35
SCE
time.
7C024/024A/0241–55
CY7C025/0251
Min
7C025/0251–55
55
55
35
35
35
20
3
3
3
0
0
0
0
0
Max
Page 9 of 21
55
55
25
25
25
55
55
25
70
45
OI
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
/I
OH
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