M24256-BWMW6T STMicroelectronics, M24256-BWMW6T Datasheet - Page 6

• Manufacturer Part Number: M24256-BWMW6T
• Description: IC EEPROM 256KBIT 400KHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M24256-BWMW6T

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 256K (32K x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Description
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Description
The M24256-Bx devices are I
(EEPROM). They are organized as 32 K × 8 bits.
The M24256-DR also offers an additional page, named the Identification Page (64 bytes)
which can be written and (later) permanently locked in Read-only mode. This Identification
Page offers flexibility in the application board production line, as it can be used to store
unique identification parameters and/or parameters specific to the production line.
The device behaves as a slave in the I
synchronized by the serial clock. Read and Write operations are initiated by a Start
condition, generated by the bus master. The Start condition is followed by a Device Select
code and Read/Write bit (RW) (as described in
Inside this Device Select code, the 4-bit device type identifier code is (1010) for the M24256-
B and is (1011) for the M24256-D.
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
Figure 1.
Table 1.
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
Signal name
Logic diagram
Signal names
2
Doc ID 6757 Rev 23
C-compatible electrically erasable programmable memories
Chip Enable
Serial Data
Serial Clock
Write Control
Supply voltage
Ground
2
M24256-BF, M24256-BR, M24256-BW, M24256-DR
C-bus protocol, with all memory operations
Function
Table
4), terminated by an acknowledge bit.
Inputs
I/O
Input
Input
Direction
th
bit