S-8232AJFT-T2-G Seiko Instruments, S-8232AJFT-T2-G Datasheet - Page 14
![IC LI-ION BATT PROTECT 8-TSSOP](/photos/6/58/65861/728-8-tssop_sml.jpg)
S-8232AJFT-T2-G
Manufacturer Part Number
S-8232AJFT-T2-G
Description
IC LI-ION BATT PROTECT 8-TSSOP
Manufacturer
Seiko Instruments
Datasheet
1.S-8232ABFT-T2-G.pdf
(28 pages)
Specifications of S-8232AJFT-T2-G
Function
Over/Under Voltage Protection
Battery Type
Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
Voltage - Supply
2 V ~ 16 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Product
Li-Ion Protection
Output Voltage
0.3 V
Operating Supply Voltage
2 V to 16 V
Supply Current
12.7 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Remark Refer to “
Normal Status
Overcurrent Status
Overcharge Status
Overdischarge Status
Operation
This IC monitors the voltages of the two serially connected batteries and the discharge current to control charging and
discharging. When the voltages of two batteries are more than the overdischarge detection voltage (V
the overcharge detection voltage (V
specified value (the VM pin voltage is equal or lower than overcurrent detection voltage 1), the charging and
discharging FETs are turned on. In this status, charging and discharging can be carried out freely. This is normal
status. In this status, the VM and VSS pins are shorted by the RVSM resistor.
When the discharging current becomes equal to or higher than a specified value (the VM pin voltage is equal to or
higher than the overcurrent detection voltage1) during discharging under the normal status and it continues for the
overcurrent detection delay time (t
overcurrent status. The VM and VSS pins are shorted by the RVSM resistor in this status. The charging FET is also
turned off. While the discharging FET is off and a load is connected, the VM pin voltage is equal to the V
The overcurrent status returns to the normal status when impedance between the EB− and EB+ pins (refer to Figure
8) is 200 MΩ or higher, by action such as releasing the load. When the load is released, the VM pin, which is shorted
to the VSS pin by the RVSM resistor, goes back to the V
to overcurrent detection voltage 1 (V
Following two cases are detected as overcharge status :
The auxiliary overcharge detection voltages (V
and are defined by following equations :
The overcharge status is released in two cases :
The mechanism to release is as follows: the discharge current flows via an internal parasitic diode of the charging
FET, immediately after connecting the load and discharging starts. Therefore the VM pin’s voltage momentarily
increases about 0.6 V (voltage as much as V
voltage by using overcurrent detection voltage 1 (V
the normal status.
If any of the battery voltages falls below the overdischarge detection voltage (V
normal status and it continues for the overdischarge detection delay time (t
off and discharging stops. This is overdischarge status. When the discharging FET turns off, the VM pin voltage
becomes equal to the V
(I
power-down statuses.
The power-down status is released when the charger is connected and the voltage between VM and VCC is
overcurrent detection voltage 2 or higher. In this status, When all the battery voltages becomes equal to or higher
than the overdischarge release voltage (V
overdischarge status.
PDN
(1) If any of the battery voltages becomes higher than the overcharge detection voltage (V
(2) Although the status is shorter than the overcharge detection delay time (t
V
or V
(1) The battery voltage which exceeded the overcharge detection voltage (V
(2) If the battery voltage which exceeded the overcharge detection voltage (V
). This is power-down status. The VM and VCC pins are shorted by the RVCM resistor in the overdischarge and
CUaux1, 2
CUaux1, 2
under the normal status and it continues for the overcharge detection delay time (t
FET turns off to stop charging. This is overcharge status. In this status, the VM and VSS pins are shorted by
the RVSM resistor.
becomes higher than the auxiliary overcharge detection voltage (V
charging. This is also overcharge status. In this status, the VM and VSS pins are shorted by the RVSM
resistor.
release voltage (V
overcharge release voltage (V
load, the charging FET turns on and the IC returns to the normal status.
[V] = 1.25 × V
*1, *2
[V] = 1.11 × V
Battery Protection IC Connection Example”.
CC
CD1, 2
CU1, 2
voltage and the IC’s current consumption falls below the power-down current consumption
CU1, 2
), the charging FET turns on and the IC returns to the normal status.
[V]
[V]
CU1, 2
IOV1
IOV1
CD1, 2
) or longer, the discharging FET is turned off to stop discharging. This is
) or lower and returns to the normal status.
), and the current flowing through the batteries becomes equal or lower than a
), however, discharging starts with removing the charger and connecting the
Seiko Instruments Inc.
F
DU1, 2
voltage of the diode has) plus the VSS pin’s voltage. The IC detects this
CUaux1, 2
) in this status, The IC returns to the normal status from the
IOV1
) are correlated with the overcharge detection voltages (V
) so that the IC releases the overcharge status and returns to
SS
potential. The IC detects that the VM pin potential returns
CUaux1, 2
DD1, 2
) or longer, the discharging FET turns
DD1, 2
), the charging FET turns off to stop
CU1, 2
CU1, 2
CU1, 2
) during discharging under the
), if any of the battery voltages
) falls below the overcharge
) is equal or higher than the
CU1, 2
) or longer, the charging
CU1, 2
) during charging
Rev.6.0
DD1, 2
CC
), less than
potential.
CU1, 2
_00
)