CP2403-GM Silicon Laboratories Inc, CP2403-GM Datasheet - Page 82

• Manufacturer Part Number: CP2403-GM
• Description: IC LCD DRIVER 32QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2403-GM

• Package / Case: 32-QFN
• Display Type: LCD
• Configuration: 64 Segment
• Interface: I²C, SMBus
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1864-5

CP2400/1/2/3
Internal Register Definition 11.7. CAPTUREn: SmaRTClock Timer Capture
SmaRTClock AddressCAPTURE0 = 0x00; CAPTURE1 = 0x01; CAPTURE2 =0x02; CAPTURE3: 0x03.
Internal Register Definition 11.8. ALARMn: SmaRTClock Alarm Programmed Value
SmaRTClock AddressALARM0 = 0x08; ALARM1 = 0x09; ALARM2 = 0x0A; ALARM3 = 0x0B
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Note: The least significant bit of the timer capture value is in CAPTURE0.0.
Note: The least significant bit of the alarm programmed value is in ALARM0.0.
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
CAPTURE[31:0] SmaRTClock Timer Capture.
ALARM[31:0] SmaRTClock Alarm Programmed Value.
Name
Name
R/W
R/W
7
0
7
0
These 4 registers (ALARM3–ALARM0) are used to set an alarm event for the SmaRTClock
timer. The SmaRTClock alarm should be disabled (RTC0AEN=0) when updating these reg-
isters.
These 4 registers (CAPTURE3–CAPTURE0) are used to read or set the 32-bit SmaRT-
Clock timer. Data is transferred to or from the SmaRTClock timer when the RTC0SET or
RTC0CAP bits are set.
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
Rev. 1.0
R/W
R/W
CAPTURE[31:0]
4
0
4
0
ALARM[31:0]
Function
Function
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0