TC7135CPI Microchip Technology, TC7135CPI Datasheet - Page 11

• Manufacturer Part Number: TC7135CPI
• Description: IC ADC 4 1/2DGT 28-DIP
• Manufacturer: Microchip Technology

Specifications of TC7135CPI

• Display Type: LED
• Configuration: 7 Segment
• Interface: BCD
• Digits Or Characters: A/D 4.5 Digits
• Current - Supply: 1mA
• Voltage - Supply: 4 V ~ 6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 158-1133; 158-1133; TC7135CPIR; TC7135CPIR

5.3
At the beginning of the signal integration phase, BUSY
goes high and remains high until the first clock pulse
after the integrator zero crossing. BUSY returns to the
logic ‘0’ state once the measurement cycle ends in an
overrange condition. The internal display latches are
loaded during the first clock pulse after BUSY and are
latched at the clock pulse end. The BUSY signal does
not go high at the beginning of the measurement cycle,
which starts with the auto-zero cycle.
5.4
If the input signal causes the reference voltage integra-
tion time to exceed 20,000 clock pulses, the OVER-
RANGE output is set to a logic ‘1’. The OVERRANGE
output register is set when BUSY goes low and is reset
at the beginning of the next reference integration
phase.
5.5
If the output count is 9% of full scale or less (-1800
counts), the UNDERRANGE register bit is set at the
end of BUSY. The bit is set low at the next signal
integration phase.
© 2007 Microchip Technology Inc.
BUSY Output
OVERRANGE Output
UNDERRANGE Output
5.6
A positive input is registered by a logic ‘1’ polarity
signal. The polarity bit is valid at the beginning of
reference integrate and remains valid until determined
during the next conversion.
The polarity bit is valid even for a zero reading. Signals
less than the converter's LSB will have the signal
polarity determined correctly. This is useful in null
applications.
5.7
Digit drive signals are positive-going signals. The scan
sequence is D
pulses wide, with the exception D
pulses wide.
All five digits are scanned continuously, unless an
overrange condition occurs. In an overrange condition,
all digit drives are held low from the final STROBE
pulse until the beginning of the next reference integrate
phase. The scanning sequence is then repeated. This
provides a blinking visual display indication.
5.8
The binary coded decimal (BCD) bits B
are positive-true logic signals. The data bits become
active at the same time as the digit drive signals. In an
overrange condition, all data bits are at a logic ‘0’ state.
POLARITY Output
Digit Drive Outputs
BCD Data Outputs
5
to D
1
. All positive pulses are 200 clock
5
TC7135
, which is 201 clock
DS21460D-page 11
8
, B
4
, B
2
and B
1