ADE7763ARSZRL Analog Devices Inc, ADE7763ARSZRL Datasheet - Page 32

• Manufacturer Part Number: ADE7763ARSZRL
• Description: IC ENERGY METERING 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7763ARSZRL

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• Ic Function: Single-Phase Active And Apparent Energy Metering IC
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADE7763ZEB - BOARD EVALUATION FOR ADE7763
• Lead Free Status / Rohs Status: Compliant
• Other names: ADE7763ARSZRL; ADE7763ARSZRLTR

ADE7763
APPARENT ENERGY CALCULATION
The apparent energy is given as the integral of the
apparent power.
The ADE7763 achieves the integration of the apparent power
signal by continuously accumulating the apparent power signal
in an internal 49-bit register. The apparent energy register
(VAENERGY[23:0]) represents the upper 24 bits of this internal
register. This discrete time accumulation or summation is
equivalent to integration in continuous time. Equation 29
expresses this relationship.
where:
n is the discrete number of time samples.
T is the time sample period.
The discrete time sample period ( T ) for the accumulation
register is 1.1 μs (4/CLKIN).
Figure 66 shows this discrete time integration or accumulation.
The apparent power signal is continuously added to the internal
register. This addition is a signed addition, even if the apparent
energy always remains positive in theory.
The 49 bits of the internal register are divided by VADIV. If the
value in the VADIV register is 0, then the internal active energy
register is divided by 1. VADIV is an 8-bit, unsigned register.
The upper 24 bits are then written in the 24-bit apparent energy
register (VAENERGY[23:0]). RVAENERGY register (24 bits
long) is provided to read the apparent energy. This register is
reset to 0 after a read operation.
Figure 67 shows this apparent energy accumulation for full-
scale signals (sinusoidal) on the analog inputs. The three curves
illustrate the minimum time for the energy register to roll over
when the VAGAIN registers content is equal to 0x7FF, 0x000,
and 0x800. The VAGAIN register is used to carry out an
apparent power calibration. As shown in the figure, the fastest
integration time occurs when the VAGAIN register is set to
maximum full scale, i.e., 0x7FF.
Apparent
Apparent
Energy
Energy
=
=
T
Lim
∫
→
Apparent
0
⎧
⎪
⎨
⎪ ⎩
∑
n
∞
=
0
Apparent
Power
Power
(
t
)
dt
(
nT
)
×
T
⎫
⎪
⎬
⎪ ⎭
(26)
(27)
Rev. B | Page 32 of 56
Note that the apparent energy register is unsigned—see Figure
67. By using the interrupt enable register, the ADE7763 can be
configured to issue an interrupt ( IRQ ) when the apparent energy
register is more than half full or when an overflow occurs. The
half full interrupt for the unsigned apparent energy register is
based on 24 bits, as opposed to 23 bits for the signed active
energy register.
0xFF FFFF
0x80 0000
0x40 0000
0x20 0000
0x00 0000
APPARENT
POWER
VAENERGY[23:0]
Figure 67. Energy Register Rollover Time for Full-Scale Power
T
+
Figure 66. Apparent Energy Calculation
(Maximum and Minimum Power Gain)
6.26
+
ACTIVE POWER
48
TIME (nT)
SIGNAL = P
48
23
12.52
VADIV
VAENERGY[23:0]
18.78
APPARENT POWER IS
ACCUMULATED (INTEGRATED) IN
THE APPARENT ENERGY REGISTER
%
25.04
0
(minutes)
VAGAIN = 0x7FF
VAGAIN = 0x000
VAGAIN = 0x800
TIME
0
0