X9530V14IT2 Intersil, X9530V14IT2 Datasheet - Page 6

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X9530V14IT2

Manufacturer Part Number
X9530V14IT2
Description
IC LASER DIODE CTRLR 14-TSSOP
Manufacturer
Intersil
Type
Laser Diode Controller (Fiber Optic)r
Datasheet

Specifications of X9530V14IT2

Number Of Channels
1
Voltage - Supply
3 V ~ 5.5 V
Current - Supply
9mA
Operating Temperature
-40°C ~ 100°C
Package / Case
14-TSSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
I2DS: C
(N
The I2DS bit sets the polarity of Current Generator 2,
DAC2. When this bit is set to “0” (default), the Current
Generator 2 of the X9530 is configured as a Current
Source. Current Generator 2 is configured as a
Current Sink when the I2DS bit is set to “1”. See
Figure 5.
Control Register 1
This register is accessed by performing a Read or Write
operation to address 81h of memory. This byte’s volatility
is determined by bit NV1234 in Control register 0.
L1DA5 - L1DA0: LUT1 D
When bit L1DAS (bit 4 in Control register 5) is set to
“1”, LUT1 is addressed by these six bits, and it is not
addressed by the output of the on-chip A/D converter.
When bit L1DAS is set to “0”, these six bits are ignored
by the X9530. See Figure 7.
A value between 00h (00
written to these register bits, to select the corresponding
row in LUT1. The written value is added to the base
address of LUT1 (90h).
Control Register 2
This register is accessed by performing a read or write
operation to address 82h of memory. This byte’s
volatility is determined by bit NV1234 in Control
register 0.
L2DA5 - L2DA0: LUT2 D
When bit L2DAS (bit 6 in Control register 5) is set to
“1”, LUT2 is addressed by these six bits, and it is not
addressed by the output of the on-chip A/D converter.
When bit L2DAS is set to “0”, these six bits are ignored
by the X9530. See Figure 7.
A value between 00h (00
written to these register bits, to select the corresponding
row in LUT2. The written value is added to the base
address of LUT2 (D0h).
Control Register 3
This register is accessed by performing a Read or Write
operation to address 83h of memory. This byte’s volatility
is determined by bit NV1234 in Control register 0.
ON
-
VOLATILE
URRENT
)
G
ENERATOR
IRECT
IRECT
10
10
6
) and 3Fh (63
) and 3Fh (63
2 D
A
A
IRECTION
CCESS
CCESS
B
B
S
10
10
ITS
ITS
ELECT
) may be
) may be
B
IT
X9530
D1DA7 - D1DA0: D/A 1 D
When bit D1DAS (bit 5 in Control register 5) is set to
“1”, the input to the D/A converter 1 is the content of
bits D1DA7 - D1DA0, and it is not a row of LUT1.
When bit D1DAS is set to “0” (default) these eight bits
are ignored by the X9530. See Figure 6.
Control Register 4
This register is accessed by performing a Read or
Write operation to address 84h of memory. This byte’s
volatility is determined by bit NV1234 in Control
register 0.
D2DA7 - D2DA0: D/A 2 D
When bit D2DAS (bit 7 in Control register 5) is set to
“1”, the input to the D/A converter 2 is the content of
bits D2DA7 - D2DA0, and it is not a row of LUT2.
When bit D2DAS is set to “0” (default) these eight bits
are ignored by the X9530. (See Figure 6).
Control Register 5
This register is accessed by performing a Read or
Write operation to address 85h of memory.
I1FSO1 - I1FSO0: C
O
These two bits are used to set the full scale output
current at the Current Generator 1 pin, I1. If both bits
are set to “0” (default), an external resistor connected
between pin R1 and Vss, determines the full scale
output current available at pin I1. The other three
options are indicated in the table below. The direction
of this current is set by bit I1DS in Control register 0.
See Figure 5.
*No external resistor should be connected in these cases between
R1 and V
I1FSO1
UTPUT
0
0
1
1
SS
S
.
ET
I1FSO0
B
ITS
0
1
0
1
(N
URRENT
ON
Set externally via pin R1 (Default)
I1 Full Scale Output Current
-
VOLATILE
IRECT
IRECT
G
ENERATOR
±0.85 mA*
A
A
±1.3 mA*
)
±0.4mA*
CCESS
CCESS
1 F
November 11, 2005
B
B
ULL
ITS
ITS
S
FN8211.1
CALE

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