PCA9634PW/S911,118 NXP Semiconductors, PCA9634PW/S911,118 Datasheet - Page 20
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PCA9634PW/S911,118
Manufacturer Part Number
PCA9634PW/S911,118
Description
IC LED DRIVER RGBA 20-TSSOP
Manufacturer
NXP Semiconductors
Type
RGBA LED Driverr
Datasheet
1.PCA9634D118.pdf
(38 pages)
Specifications of PCA9634PW/S911,118
Topology
Open Drain, PWM
Number Of Outputs
8
Internal Driver
Yes
Type - Primary
Backlight, LED Blinker
Type - Secondary
RGBA
Frequency
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Voltage - Output
5.5V
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
25mA
Internal Switch(s)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Efficiency
-
Other names
935285522118
PCA9634PW/S911-T
PCA9634PW/S911-T
PCA9634PW/S911-T
PCA9634PW/S911-T
NXP Semiconductors
8. Characteristics of the I
PCA9634_6
Product data sheet
8.1.1 START and STOP conditions
8.1 Bit transfer
8.2 System configuration
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Fig 9.
Fig 10. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
Bit transfer
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 06 — 12 September 2008
10).
Figure
data valid
data line
stable;
11).
Figure
allowed
change
of data
9).
8-bit Fm+ I
STOP condition
mba607
P
PCA9634
2
© NXP B.V. 2008. All rights reserved.
C-bus LED driver
mba608
SDA
SCL
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