IR22141SS International Rectifier, IR22141SS Datasheet - Page 13
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IR22141SS
Manufacturer Part Number
IR22141SS
Description
IC DRIVER HALF BRIDGE SGL 24SSOP
Manufacturer
International Rectifier
Datasheet
1.IR21141SSTRPBF.pdf
(34 pages)
Specifications of IR22141SS
Configuration
Half Bridge
Input Type
Non-Inverting
Delay Time
440ns
Current - Peak
2A
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
1200V
Voltage - Supply
11.5 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Family Hvic
General Purpose HVICs
Channels
2
Topology
Half Bridge
Application
General Purpose / Motor Control
Voffset
1200
Io+ (ma)
2000
Io- (ma)
3000
Separate Power And Logic Ground
Yes
Uvlo
Vcc / Vbs
Vbsuv+ / Vccuv+ Min (v)
9.3
Vbsuv+ / Vccuv+ Typ (v)
10.2
Vbsuv+ / Vccuv+ Max (v)
11.4
Vbsuv- / Vccuv- Min (v)
8.7
Vbsuv- / Vccuv- Typ (v)
9.3
Vbsuv- / Vccuv- Max (v)
10.3
Dt / Sdt Min (ns)
5700
Dt / Sdt Typ (ns)
9250
Dt / Sdt Max (ns)
13500
T On Min (ns)
220
T On Typ (ns)
440
T On Max (ns)
660
T Off Min (ns)
220
T Off Typ (ns)
440
T Off Max (ns)
660
Fault Reporting
Yes
Package
24 Lead
Part Status
Active & Preferred
Special Features
Soft Shutdown and Desaturation Detection
For Use With
IRMD2214SS - KIT DESIGN EVAL BOARD IR2214SSIRMD22141SS - KIT DESIGN EVAL BOARD/IR22141SS
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*IR22141SS
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IR22141SS
Manufacturer:
IR
Quantity:
20 000
Company:
Part Number:
IR22141SSPBF
Manufacturer:
International Rectifier
Quantity:
135
Part Number:
IR22141SSPBF
Manufacturer:
IR
Quantity:
20 000
Part Number:
IR22141SSTRPBF
Manufacturer:
IR
Quantity:
20 000
www.irf.com
The external sensing diode should have breakdown
voltage greater than 600 V (IR21141) or 1200 V
(IR22141), and low stray capacitance (in order to
minimize noise coupling and switching delays). The
diode is biased by an internal pull-up resistor R
(equal to V
(see the active-bias section). To limit the current flowing
through DSH and DSL in case of desaturation an
external Schottky diode is required, as shown in Fig. 13.
When V
increases too. Being internally biased to the local supply,
the DSH/DSL voltage is automatically clamped. When
DSH/DSL
comparator triggers (see Fig. 13). The comparator’s
output is filtered in order to avoid false desaturation
detection by externally induced noise; pulses shorter
than t
desaturation event during IGBT turn on, the desaturation
circuit is disabled by a blanking signal (T
block in Fig. 13). This time is the estimated maximum
IGBT turn on time and must be not exceeded by proper
gate resistance sizing. When the IGBT is not completely
saturated after T
driver will turn off.
Eligible desaturation signals initiate the SSD sequence.
While in SSD, the driver’s output goes to a high
impedance state and the SSD pull-down is activated to
turn off the IGBT through the SSDH/SSDL pin. The
DS
CE
are filtered out. To avoid detecting a false
increases, the voltage at the DSH or DSL pin
CC
exceeds
/I
DS-
BL
or V
, desaturation is detected and the
(external hard
FAULT/SD
shutdown)
BS
SY_FLT
(external
FLTCLR
the
hold)
/I
DS-
) or by a dedicated circuit
V
DESAT+
Figure 13: High and Low Side Output Stage
Figure 14: Fault Management Diagram
internal
HOLD
threshold,
BL
, see blanking
(hard shutdown)
internal FAULT
DSH/L
the
13
SY_FLT output pin (active low, see Fig. 14) reports the
gate driver status during the SSD sequence (t
the SSD has finished, SY_FLT releases, and the gate
driver generates a FAULT signal (see the FAULT/SD
section) by activating the FAULT/SD pin. This generates
a hard shutdown for both the high and low output stages
(HO=LO=low). Each driver is latched low until the fault is
cleared (see FLT_CLR).
Figure 14 shows the fault management circuit. In this
diagram DesatHS and DesatLS are two internal signals
that come from the output stages (see Fig. 13).
It must be noted that while in SSD, both the
undervoltage fault and external SD are masked until the
end of SSD. Desaturation protection is working
independently by the other control pin and it is disabled
only when the output status is off.
1.4.4 Fault Management in Multi-Phase Systems
In a system with two or more gate drivers the
IR21141/IR22141 devices must be connected as shown
in Fig. 15.
Q
Q
SET
CLR
S
R
IR21141/IR22141SSPbF
DesatHS
DesatLS
UVCC
© 2009 International Rectifier
SS
). Once