EL7158ISZ Intersil, EL7158ISZ Datasheet

IC DVR PIN 40MHZ 3STATE 8-SOIC

EL7158ISZ

Manufacturer Part Number
EL7158ISZ
Description
IC DVR PIN 40MHZ 3STATE 8-SOIC
Manufacturer
Intersil
Type
High Sider
Datasheet

Specifications of EL7158ISZ

Configuration
High or Low Side
Input Type
Non-Inverting
Delay Time
22ns
Current - Peak
12A
Number Of Configurations
1
Number Of Outputs
1
Voltage - Supply
4.5 V ~ 12 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Current - Output / Channel
500mA
On-state Resistance
500 mOhm
Current - Peak Output
12A
Supply Voltage Min
4.5V
Supply Voltage Max
12V
No. Of Outputs
1
Output Voltage
12V
Output Current
12A
Driver Case Style
SOIC
Msl
MSL 3 - 168 Hours
Device Type
Pin
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EL7158ISZ
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
EL7158ISZ-T7
Manufacturer:
Intersil
Quantity:
3 200
Ultra-High Current Pin Driver
applications. The 12A peak drive capability makes this part
an excellent choice when driving high capacitance loads.
The output pin OUT is connected to input pins VH or VL
respectively, depending on the status of the IN pin. When the
OE pin is active low, the output is placed in the three-state
mode. The isolation of the output FETs from the power
supplies enables VH and VL to be set independently,
enabling level-shifting to be implemented. Related to the
EL7155, the EL7158 adds a lower supply pin VS- and makes
VL an isolated and independent input. This feature adds
applications flexibility and improves switching response due
to the increased enhancement of the output FETs.
This pin driver has improved performance over existing pin
drivers. It is specifically designed to operate at voltages
down to 0V across the switch elements while maintaining
good speed and ON-resistance characteristics.
Available in the 8 Ld SOIC package, the EL7158 is specified
for operation over the full -40°C to +85°C temperature range.
Pinout
GND
VS+
OE
IN
1
2
3
4
The EL7158 high performance pin
driver with three-state is suited to
many ATE and level-shifting
(8 LD SOIC)
TOP VIEW
O
G
C
L
I
EL7158
®
1
Copyright © Intersil Americas Inc. 2003, 2004, 2007. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
Data Sheet
8
7
6
5
VH
OUT
VL
VS-
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Clocking speeds up to 40MHz
• 12ns t
• 0.2ns rise and fall times mismatch
• 0.5ns t
• 3.5pF typical input capacitance
• 12A peak drive
• Low ON-resistance of 0.5Ω
• High capacitive drive capability
• Operates from 4.5V to 12V
• Pb-free plus anneal available (RoHS compliant)
Applications
• ATE/burn-in testers
• Level shifting
• IGBT drivers
• CCD drivers
Ordering Information
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
EL7158IS
EL7158IS-T7
EL7158IS-T13
EL7158ISZ
(Note)
EL7158ISZ-T7
(Note)
EL7158ISZ-T13
(Note)
NUMBER
PART
All other trademarks mentioned are the property of their respective owners.
R
ON
May 14, 2007
/t
|
F
-t
Intersil (and design) is a registered trademark of Intersil Americas Inc.
at 2000pF C
OFF
7158IS
7158IS
7158IS
7158ISZ
7158ISZ
7158ISZ
prop delay mismatch
MARKING
PART
LOAD
PACKAGE
8 Ld SOIC
8 Ld SOIC
8 Ld SOIC
8 Ld SOIC
(Pb-free)
8 Ld SOIC
(Pb-free)
8 Ld SOIC
(Pb-free)
TAPE &
REEL
EL7158
13”
13”
7”
7”
-
-
FN7349.2
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
DWG. #
PKG.

Related parts for EL7158ISZ

EL7158ISZ Summary of contents

Page 1

... VL EL7158ISZ-T7 (Note) 5 VS- EL7158ISZ-T13 (Note) NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. CAUTION: These devices are sensitive to electrostatic discharge ...

Page 2

... EL7158 Thermal Information = +25°C) Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C - -0.3V, V +0.3V Ambient operating Temperature . . . . . . . . . . . . . . . .-40°C to +85° Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = +12V 0V 0V +25°C, unless otherwise specified ...

Page 3

Electrical Specifications +12V PARAMETER DESCRIPTION INPUT V Logic ‘1’ Input Voltage IH I Logic ‘1’ Input Current IH V Logic ‘0’ Input Voltage IL I Logic ‘0’ Input Current IL C Input Capacitance IN R ...

Page 4

Typical Performance Curves T = +25°C 1.8 HIGH THRESHOLD 1.6 1.4 1.2 1 SUPPLY VOLTAGE (V) FIGURE 1. INPUT THRESHOLD vs SUPPLY VOLTAGE I = 500mA +25° OUT S 0.8 0.7 V ...

Page 5

Typical Performance Curves C = 2000pF 12V -50 - TEMPERATURE (°C) FIGURE 7. PROPAGATION DELAY vs TEMPERATURE ...

Page 6

TABLE 1. TRUTH TABLE Three-State 0 1 Three-State INPUT INVERTED OUTPUT 4.7µF 0.1µ 10kΩ OE GND FIGURE 14. STANDARD TEST CONFIGURATION 6 EL7158 TABLE 2. OPERATING ...

Page 7

Pin Descriptions PIN NAME 1 VS+ Positive Supply Voltage 2 OE Output Enable 3 IN Input 4 GND Ground 5 VS- Negative Supply Voltage 6 VL Lower Output Voltage 7 OUT Output 8 VH High Output Voltage ...

Page 8

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 9

Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...

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