EL7158ISZ Intersil, EL7158ISZ Datasheet - Page 8

• Manufacturer Part Number: EL7158ISZ
• Description: IC DVR PIN 40MHZ 3STATE 8-SOIC
• Manufacturer: Intersil
• Type: High Sider

Specifications of EL7158ISZ

• Configuration: High or Low Side
• Input Type: Non-Inverting
• Delay Time: 22ns
• Current - Peak: 12A
• Number Of Configurations: 1
• Number Of Outputs: 1
• Voltage - Supply: 4.5 V ~ 12 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Current - Output / Channel: 500mA
• On-state Resistance: 500 mOhm
• Current - Peak Output: 12A
• Supply Voltage Min: 4.5V
• Supply Voltage Max: 12V
• No. Of Outputs: 1
• Output Voltage: 12V
• Output Current: 12A
• Driver Case Style: SOIC
• Msl: MSL 3 - 168 Hours
• Device Type: Pin
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Applications Information
Product Description
The EL7158 is a high performance 40MHz pin driver. It
contains two analog switches connecting VH and VL to OUT.
Depending on the value of the IN pin, one of the two
switches will be closed and the other switch open. An output
enable (OE) is also supplied which opens both switches
simultaneously.
Due to the topology of the EL7158, both the VH and VL pins
can be connected to any voltage between the VS+ and VS-
pins, but VH must be greater than VL in order to prevent
turning on the body diode at the output stage.
Three-State Operation
When the OE pin is low, the output is three-state (floating).
The output voltage is the parasitic capacitance’s voltage. It
can be any voltage between VH and VL, depending on the
previous state. At three-state, the output voltage can be
pushed to any voltage between VH and V
voltage can’t be pushed higher than VH or lower than VL
since the body diode at the output stage will turn on.
Supply Voltage Range and Input Compatibility
The EL7158 is designed for operation on supplies from 5V to
18V (4.5V to 18V maximum). Table 2 shows the
specifications for the relationship between the VS+, VS-, VH,
VL, and GND pins.
All input pins are compatible with both 3V and 5V CMOS
signals. With a positive supply (V
also compatible with TTL inputs.
Power Supply Bypassing
When using the EL7158, it is very important to use adequate
power supply bypassing. The high switching currents
developed by the EL7158 necessitate the use of a bypass
capacitor between the supplies (V
pins. It is recommended that a 2.2µF tantalum capacitor be
used in parallel with a 0.1µF low-inductance ceramic MLC
capacitor. These should be placed as close to the supply
pins as possible. It is also recommended that the V
pins have some level of bypassing, especially if the EL7158
is driving highly capacitive loads.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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8
S
S
+) of 5V, the EL7158 is
+ and V
L
. The output
S
-) and GND
H
and V
L
EL7158
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the
EL7158 drive capability is limited by the rise in die
temperature brought about by internal power dissipation. For
reliable operation die temperature must be kept below
T
dissipation for a given application prior to selecting the
package type.
Power dissipation may be calculated:
where:
Having obtained the application’s power dissipation, a
maximum package thermal coefficient may be determined,
to maintain the internal die temperature below T
where:
θ
standard JEDEC JESD51-3 single-layer test board. If T
is greater than +125°C when calculated using Equation 2 ,
then one of the following actions must be taken:
PD
θ
JA
JMAX
JA
V
GND)
V
C
C
I
f is frequency
T
T
PD is the power dissipation calculated above
θ
Reduce θ
into the PCB (as compared to the standard JEDEC
JESD51-3)
De-rate the application either by reducing the switching
frequency, the capacitive load, or the maximum operating
(ambient) temperature (T
S
JA
S
OUT
JMAX
MAX
L
INT
=
is 160°C/W for the SOIC8 package when using a
=
is the quiescent supply current (3mA max)
is the load capacitance
is the total power supply to the EL7158 (from V
(
thermal resistance on junction to ambient
T
---------------------------------------- -
V
(+125°C). It is necessary to calculate the power
is the internal load capacitance (100pF max)
JMAX
S
is the swing on the output (V
is the maximum operating temperature
is the maximum junction temperature (+125°C)
×
I
JA
PD
S
–
)
the system by designing more heat-sinking
+
T
MAX
(
C
INT
×
V
S
2
MAX
×
f )
)
+
(
C
L
H
×
- V
V
OUT
L
)
2
×
JMAX
f )
May 14, 2007
S
:
FN7349.2
(EQ. 1)
(EQ. 2)
+ to
JMAX