A3936SED Allegro Microsystems Inc, A3936SED Datasheet - Page 8

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A3936SED

Manufacturer Part Number
A3936SED
Description
IC MOTOR DRIVER PWM 3PH 44-PLCC
Manufacturer
Allegro Microsystems Inc
Datasheets

Specifications of A3936SED

Applications
DC Motor Driver, Brushless (BLDC), 3 Phase
Number Of Outputs
1
Current - Output
±3A
Voltage - Load
9 V ~ 50 V
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Operating Current
10mA
Operating Temperature Classification
Commercial
Package Type
PLCC
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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A3936
PWM Blank Timer.
current spike occurs due to the reverse recovery currents of
the clamp diodes and/or switching transients related to
distributed capacitance in the load. To prevent this current
spike from erroneously resetting the source enable latch, the
sense comparator is blanked. The blank timer runs after the
off time counter to provide the blanking function. The blank
timer is reset when ENABLE is chopped or DIR is changed.
For external PWM control, a DIR change or ENABLE ON
will trigger the blanking function. The duration is adjusted
by control input BLANK.
Brake.
brake function, logic low allows normal operation. Brake
will turn all three sink drivers ON and effectively shorts out
the motor generated BEMF. It is important to note that the
internal PWM current control circuit will not limit the
current when braking, since the current does not flow
through the sense resistor. The maximum current can be
approximated by V
that the maximum ratings of the device are not exceeded in
worse case braking situations of high speed and high
inertial loads.
Oscillator.
oscillator set by a resistor connected from the OSC terminal
to V
Tach.
measurement. This open collector output toggles at each
Hall transition.
DD
. Typical value of 4Mhz is set with 51k resistor.
A tachometer signal is available for speed
Logic high to the brake terminal activates the
F
OSC
The PWM timer is based on an internal
= 204E9/R
BLANK
BEMF
0
1
/R
When a source driver turns on, a
OSC
L
. Care should be taken to insure
.
12/f
t
6/f
BLANK
OSC
OSC
DMOS Three-Phase PWM Motor Driver
Synchronous Rectification.
the SR terminal enables synchronous rectification. When a
PWM off cycle is triggered, either by an ENABLE chop
command or internal fixed off time cycle, load current will
recirculate according to the decay mode selected by control
logic. The A3936 synchronous rectification feature will turn
on the appropriate MOSFET(s)during the current decay and
effectively short out the body diodes with the low Rdson
driver. This will lower power dissipation significantly and
can eliminate the need for external schottky diodes.
Reversal of load current is prevented by turning off
synchronous rectification when a zero current level is
detected.
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
Logic high applied to
8

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