L6563S STMicroelectronics, L6563S Datasheet

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L6563S

Manufacturer Part Number
L6563S
Description
IC PFC CTRLR TRANSITION 14SOIC
Manufacturer
STMicroelectronics
Datasheets

Specifications of L6563S

Mode
Discontinuous (Transition)
Current - Startup
90µA
Voltage - Supply
10.3 V ~ 22.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
14-SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Features
December 2010
Figure 1.
Tracking boost function
Fast “bidirectional” input voltage feedforward
(1/V
Interface for cascaded converter's PWM
controller
Remote ON/OFF control
Accurate adjustable output overvoltage
protection
Protection against feedback loop
disconnection (latched shutdown)
Inductor saturation protection
Low (≤ 100 µA) start-up current
6 mA max. operating bias current
1% (@ T
-600/+800 mA totem pole gate driver with
active pull-down during UVLO
SO14 package
2
correction)
J
Block diagram
= 25 °C) internal reference voltage
Enhanced transition-mode PFC controller
Doc ID 16116 Rev 4
Applications
PFC pre-regulators for:
High-end AC-DC adapter/charger
Desktop PC, server, Web server
IEC61000-3-2 or JEITA-MITI compliant SMPS,
in excess of 400 W
SO14
L6563S
www.st.com
1/43
43

Related parts for L6563S

L6563S Summary of contents

Page 1

... UVLO ■ SO14 package Figure 1. Block diagram December 2010 Enhanced transition-mode PFC controller Applications PFC pre-regulators for: ■ High-end AC-DC adapter/charger ■ Desktop PC, server, Web server ■ IEC61000-3-2 or JEITA-MITI compliant SMPS, in excess of 400 W Doc ID 16116 Rev 4 L6563S SO14 1/43 www.st.com 43 ...

Page 2

... Feedback failure protection (FFP 6.3 Voltage feedforward . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.4 THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.5 Tracking boost function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6.6 Inductor saturation detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6.7 Power management/housekeeping functions . . . . . . . . . . . . . . . . . . . . . . 31 7 Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 9 Ordering codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 2/43 Doc ID 16116 Rev 4 L6563S ...

Page 3

... L6563S List of table Table 1. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. Thermal data Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 5. Summary of L6563S idle states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6. SO14 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 7. Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Doc ID 16116 Rev 4 List of table 3/43 ...

Page 4

... Effect of boost inductor saturation on the MOSFET current and detection method . . . . . . 31 Figure 43. Interface circuits that let dc-dc converter's controller IC drive L6563S in burst mode . . . . 32 Figure 44. Interface circuits that let the L6563S switch on or off a PWM controller Figure 45. Interface circuits for power up sequencing when dc-dc has the SS function . . . . . . . . . . . 33 Figure 46. ...

Page 5

... Figure 53. EVL6563S-250W TM PFC demonstration board: electrical schematic . . . . . . . . . . . . . . . 37 Figure 54. ...

Page 6

... Description 1 Description The L6563S is a current-mode PFC controller operating in transition mode (TM). Coming with the same pin-out as its predecessor L6563, it offers improved performance and additional functions. The highly linear multiplier, along with a special correction circuit that reduces crossover distortion of the mains current, allows wide-range-mains operation with an extremely low THD even over a large load range ...

Page 7

... L6563S 2 Maximum ratings 2.1 Absolute maximum ratings Table 1. Absolute maximum ratings Symbol Vcc --- --- Analog inputs and outputs V PWM_STOP I PWM_STOP I ZCD VFF pin Other pins 2.2 Thermal data Table 2. Thermal data Symbol R Max. thermal resistance, junction-to-ambient thJA Ptot Power dissipation @T T Junction temperature operating range ...

Page 8

... GND defines a current that is sunk from pin INV (#1). In this way, the 6 TBO output voltage is changed proportionally to the mains voltage (tracking boost). If this function is not used leave this pin open. 8/43 Function 2 function. A capacitor and a parallel resistor must be Doc ID 16116 Rev 4 L6563S ...

Page 9

... L6563S Table 3. Pin description (continued) n° Name PFC pre-regulator output voltage monitoring/disable function. This pin senses the output voltage of the PFC pre-regulator through a resistor divider and is used for protection purposes. If the voltage on the pin exceeds 2.5 V the IC stops switching and restarts as the voltage on the pin falls below 2 ...

Page 10

... Pin connection Figure 3. Typical system block diagram 10/43 Doc ID 16116 Rev 4 L6563S ...

Page 11

... L6563S 4 Electrical characteristics T = -25 to 125 ° MΩ between pin VFF and GND; unless otherwise specified. FF Electrical characteristics Table 4. Symbol Parameter Supply voltage Vcc Operating range Vcc Turn-on threshold On Vcc Turn-off threshold Off Vcc Vcc for resuming from latch restart Hys Hysteresis ...

Page 12

... °C J (1) voltage rising (1) voltage rising °C V > V PFC_OK PFC_OK_S I = 2.5 mA ZCD 2.5 mA ZCD Doc ID 16116 Rev 4 L6563S Min. Typ. Max. Unit MHz 2.5 4.5 mA 5.7 6.2 6.7 2.3 2.4 2.5 V 2.1 2.25 2.4 1 µ ...

Page 13

... L6563S Electrical characteristics (continued) Table 4. Symbol Parameter Triggering voltage V ZCDT (negative-going edge) I Input bias current ZCDb I Source current capability ZCDsrc I Sink current capability ZCDsnk Tracking boost function ΔV Dropout voltage V I Linear operation TBO I -I current mismatch INV TBO I -I current mismatch ...

Page 14

... PWM_LATCH I = -0.25 mA PWM_LATCH Vcc = Vcc Off I = -0.25 mA PWM_LATCH Vcc = Vcc °C Off 100 mA sink source mA; Vcc = 20 V source Vcc CCon ) Doc ID 16116 Rev 4 Min. Typ. Max. Unit 0.8 4.5 2.5 2.8 0.6 9.8 10.3 -0.6 0 sink L6563S µ 1 110 1.1 V ...

Page 15

... L6563S 5 Typical electrical performance Figure 4. IC consumption vs V   100 10 1 Co=1nF f =70kHz Tj = 25°C 0.1 0.01 0. 001 Vcc [V ] Figure 6. Vcc Zener voltage vs T   -50 - (C) Figure 5. CC   0.1 VccOFF VccON 0.01 - Figure 7. J   -50 -25 100 125 150 175 ...

Page 16

... VCC = 12V -50 100 125 150 175 Figure 11. OVP levels   VCC = -50 75 100 125 150 175 Doc ID 16116 Rev 4 E/A output clamp levels vs T Uper Clam 12V Lower Clamp - 100 125 Tj ( Resta 100 125 Tj (C) L6563S J 150 175 150 175 ...

Page 17

... L6563S Figure 12. Inductor saturation threshold vs T   1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 -50 - (C) Figure 14. ZCD sink/source capability vs T   -50 - (C) Figure 13. Vcs clamp   100 125 150 175 Figure 15. ZCD clamp level   curren 12V 3 2 Source current ...

Page 18

... VCC = 12V -1.8 -2 -2.2 ITBO = 25uA -2.4 -2.6 -2.8 -3 100 125 150 175 Doc ID 16116 Rev dropout vs T VFF TBO - 100 125 mismatch vs I INV TBO VCC = 12V 25°C 0 100 200 300 400 I(TBO) L6563S J 150 175 current TBO 500 600 ...

Page 19

... L6563S Figure 20. R discharge vs T   -50 - (C) Figure 22 dropout vs T MULTpk VFF   - - -50 - (C) Figure 21. Line drop detection threshold   -50 100 125 150 175 Figure 23. PFC_OK threshold 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 100 125 150 175 -50 Doc ID 16116 Rev 4 ...

Page 20

... Figure 25. PWM_LATCH high saturation   100 125 150 17 5 -50 Figure 27. PWM_STOP low saturation 0 0 -50 100 125 150 175 Doc ID 16116 Rev 4 VCC = 12V Iso urce =500u A Iso urce =250u A - 100 125 T j (C) VCC = 12V Isink = - 100 125 Tj (C) L6563S J 150 175 J 150 175 ...

Page 21

... L6563S Figure 28. Multiplier characteristics @   0 0.5 0 Figure 30. Multiplier gain vs T   -50 - (C) Figure 29. Multiplier characteristics   700 VCOMP Upper voltage cl amp 600 .0V 4.5 V 500 400 4. 0V 300 3.5 V 200 3.0 100 2 0 0.9 1 1.1 0 Figure 31. Gate drive clamp   12. 9 12.85 12 ...

Page 22

... Tj (C) 22/43 Figure 33. Delay to output 300 High level 250 200 150 100 Low level 50 -50 100 125 150 175 J After OCP Timer F irst Cicle 100 125 150 175 Doc ID 16116 Rev 4 J VCC = 12V - 100 125 Tj (C) L6563S 150 175 ...

Page 23

... L6563S 6 Application information 6.1 Overvoltage protection Normally, the voltage control loop keeps the output voltage Vo of the PFC pre-regulator close to its nominal value, set by the ratio of the resistors R1 and R2 of the output divider. A pin of the device (PFC_OK) has been dedicated to monitor the output voltage with a separate resistor divider (R3 high, R4 low, see the voltage at the pin reaches 2 ...

Page 24

... PWM controller IC in the cascaded dc-dc converter, so that the entire unit is latched off. To restart the system it is necessary to recycle the input power, so that the Vcc voltage of both the L6563S goes below 6V and that one of the PWM controller goes below its UVLO threshold. ...

Page 25

... Clearly a trade-off was required. The L6563S realizes a NEW voltage feed forward that, with a technique that makes use of just two external parts, strongly minimizes this time constant trade-off issue whichever voltage change occurs on the mains, both surges and drops ...

Page 26

... and C to the pin, the IC will not work properly if the pin is either left function of 3rd harmonic distortion introduced in the input 0 Doc ID 16116 Rev 4 is triangular with a peak-to- FF MULTpk 100 ·C based on the mV). VFF_min _ max − VFF _ min min L6563S ...

Page 27

... L6563S 6.4 THD optimizer circuit The L6563S is provided with a special circuit that reduces the conduction dead-angle occurring to the AC input current near the zero-crossings of the line voltage (crossover distortion). In this way the THD (total harmonic distortion) of the current is considerably reduced. A major cause of this distortion is the inability of the system to transfer energy effectively when the instantaneous line voltage is very low ...

Page 28

... This is commonly referred to as “tracking boost” or “follower boost” approach. With the L6563S this can be realized by connecting a resistor (RT) between the TBO pin and ground. The TBO pin presents a DC level equal to the peak of the MULT pin voltage and is then representative of the mains RMS voltage ...

Page 29

... L6563S V(TBO)/RT, that is internally 1:1 mirrored and sunk from pin INV (#1) input of the L6563S's error amplifier. In this way, when the mains voltage increases the voltage at TBO pin will increase as well and so will do the current flowing through the resistor connected between TBO and GND. Then a larger current will be sunk by INV pin and the output voltage of the PFC pre-regulator will be forced to get higher ...

Page 30

... However, in some applications such as ac-dc adapters, where the PFC pre-regulator is turned off at light load for energy saving reasons, even a well-designed boost inductor may 30/43 Figure 42 Doc ID 16116 Rev 4 L6563S ) that during the current sense ...

Page 31

... To cope with a saturated inductor, the L6563S is provided with a second comparator on the current sense pin (CS, pin 4) that stops the IC if the voltage, normally limited within 1.1 V, exceeds 1.7 V. After that, the IC will be attempted to restart by the internal starter circuitry ...

Page 32

... PWM controller the pin PWM_STOP can be connected to the output of the error amplifier ( Figure 44 a). Figure 44. Interface circuits that let the L6563S switch on or off a PWM controller If the chip is provided with a soft-start pin possible to delay the start-up of the dc-dc stage with respect to that of the PFC stage, which is often desired, as described in Figure 45 ...

Page 33

... L6563S Figure 45. Interface circuits for power up sequencing when dc-dc has the SS function If this is not the case not possible to achieve a start-up delay long enough (because this prevents the dc-dc stage from starting up correctly) or, simply, the PWM controller is devoid of soft start, the arrangement of voltage generated by the PFC stage reaches a preset value ...

Page 34

... Application information In table possible to find a summary of all of the above mentioned working conditions that cause the device to stop operating. Figure 47. Brownout protection (master PFC) Table 5. Summary of L6563S idle states Caused or revealed Condition bey UVLO Vcc < Vcc Off PFC_OK > V PFC_OK_S Feedback AND disconnected INV < ...

Page 35

... L6563S 7 Application examples and ideas Figure 48. Demonstration board EVL6563S-100W, wide-range mains: electrical schematic Application examples and ideas Doc ID 16116 Rev 4 35/43 ...

Page 36

... Application examples and ideas Figure 49. L6563S 100 W TM PFC demonstration board: compliance to EN61000-3-2 standard   Meas ured value 1 0.1 0.01 0.001 0.0001 Harmonic Order [n] Figure 51. L6563S 100 W TM PFC demonstration board: input current waveform @230- 100 W load 36/43 Figure 50. L6563S 100 W TM PFC ...

Page 37

... PFC-OK PWM-LATCH C15 C15 R27 R27 2N2 2N2 56K 56K JP2 JP2 WIRE JUMPER WIRE JUMPER R28 R28 1M0 1M0 Figure 54. EVL6563S-400W FOT PFC demonstration board: electrical schematic F1 F1 CM-1.5mH-5A CM-1.5mH- 8A/250V 8A/250V 1M5 1M5 470nF-X2 470nF-X2 ...

Page 38

... Application examples and ideas Figure 55. EVL6563S-ZRC200W 200W PFC pre-regulator with ripple-free input current: electrical schematic 330nF 330nF CX2 CX2 38/43 Doc ID 16116 Rev 4 L6563S ...

Page 39

... L6563S 8 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK trademark. Table 6. SO14 mechanical data Dim ddd mm. Min Typ 1 ...

Page 40

... Package mechanical data Figure 56. Package dimensions 40/43 Doc ID 16116 Rev 4 L6563S ...

Page 41

... L6563S 9 Ordering codes Table 7. Ordering information Order codes L6563S L6563STR Package SO14 Doc ID 16116 Rev 4 Ordering codes Packing Tube Tape and reel 41/43 ...

Page 42

... Revision 1 Initial release. 2 Updated mechanical data. 3 Updated Table 4 on page Updated Figure 1 on page 4 page 8, Table 4 on page page 24. Doc ID 16116 Rev 4 Changes 11. 1, Figure 24 on page 20, Table 3 on 11, Table 5 on page 34 and Section 6.2 on L6563S ...

Page 43

... L6563S Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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