LTC3589HUJ#PBF Linear Technology, LTC3589HUJ#PBF Datasheet - Page 34

• Manufacturer Part Number: LTC3589HUJ#PBF
• Description: IC DC/DC CONV 8-OUTPUT 40QFN
• Manufacturer: Linear Technology

Specifications of LTC3589HUJ#PBF

• Applications: Handheld/Mobile Devices
• Current - Supply: 8µA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: *
• Primary Input Voltage: 5.5V
• No. Of Outputs: 8
• Output Voltage: 5V
• Output Current: 1.6A
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +150°C
• Msl: MSL 1 - Unlimited
• No. Of Ldo Regulators: 3
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC3589/LTC3589-1
OPERATION
I
The I
built-in timing delays to ensure correct operation when
addressed from an I
contains input filters designed to suppress glitches should
the bus become corrupted.
I
A bus master signals the beginning of communications
by transmitting a START condition. A START condition is
generated by transitioning SDA from HIGH to LOW while
SCL is HIGH. The master may transmit either the slave
write or the slave read address. Once data is written to
the LTC3589/LTC3589-1, the master may transmit a STOP
condition that commands the LTC3589/LTC3589-1 to act
upon its new command set. A STOP condition is sent by
the master by transitioning SDA from LOW to HIGH while
SCL is HIGH. The bus it then free for communication with
another I
SDA
34
SCL
2
2
C Bus Speed
C START and STOP Conditions
START
2
C port operates at speeds up to 400kHz. It has
0
0
1
2
SDA
SCL
t
C device.
HD, STA
1
1
2
1
1
3
ADDRESS
CONDITION
0
0
4
START
1
1
5
0
0
6
2
C compliant master device. It also
0 WR
0
7
t
LOW
0
8
ACK
9
t
S7 S6 S5 S4 S3 S2 S1 S0
r
Figure 19. LTC3589/LTC3589-1 I
1
t
HIGH
t
2
SU, DAT
SUB ADDRESS
3
t
f
4
5
Figure 18. LTC3589/LTC3589-1 I
6
7
t
HD, DAT
8
ACK
9
D7 D6 D5 D4 D3 D2 D1 D0
1
2
3
REPEATED START
2
4
C Serial Port Multiple Write Pattern
DATA
CONDITION
5
I
Each byte sent to or received from the LTC3589/LTC3589-1
must be 8 bits long followed by an extra clock cycle for the
acknowledge bit. The data should be sent to the LTC3589/
LTC3589-1 most significant bit (MSB) first.
I
The acknowledge signal is used for handshaking between
the master and the slave. When the LTC3589/LTC3589-1
is written to, it acknowledges its write address and sub-
sequent register address and data bytes. When reading
from the LTC3589/LTC3589-1, it acknowledges its read
address and 8-bit status byte.
An acknowledge pulse (active LOW) generated by the
LTC3589/LTC3589-1 lets the master know that the latest
byte of information was transferred. The master generates
the clock cycle and releases the SDA line (HIGH) during
the acknowledge clock cycle. The LTC3589/LTC3589-1
2
2
6
C Byte Format
C Acknowledge
t
7
HD, STA
8
2
ACK
C Timing
9
t
HD, STA
S7 S6 S5 S4 S3 S2 S1 S0
1
t
SP
2
3
SUB ADDRESS
4
5
6
7
8
ACK
9
STOP
D7 D6 D5 D4 D3 D2 D1 D0
1
t
SU, STO
2
t
BUF
3
DATA
4
START
5
3589 F18
6
7
8
ACK
9
3589fc
3589 F19
STOP