IR3527MTRPBF International Rectifier, IR3527MTRPBF Datasheet - Page 13

• Manufacturer Part Number: IR3527MTRPBF
• Description: IC CTRL XPHASE3 DUAL 24-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase3™r

Specifications of IR3527MTRPBF

• Applications: Processor
• Current - Supply: 8mA
• Voltage - Supply: 8 V ~ 28 V
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: *
• Package: 24-Lead MLPQ
• Circuit: X-Phase Phase IC
• Iout (a): 1.3A Gate Driver
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Over Voltage Protection (OVP)
The IR3527 includes over-voltage protection that turns on the low side MOSFET to protect the load in the event of a
shorted high-side MOSFET, converter out of regulation, or connection of the converter output to an excessive
output voltage. As shown in Figure 7, if ISHARE pin voltage is above V(VCCL) – 0.8V, which represents over-
voltage condition detected by control IC, the over-voltage latch is set. GATEL drives high and GATEH drives low.
The OVP circuit overrides the normal PWM operation and within approximately 150ns will fully turn-on the low side
MOSFET, which remains ON until ISHARE drops below V(VCCL) – 0.8V when over voltage ends. The over voltage
fault is latched in control IC and can only be reset by cycling the power to control IC. The error amplifier output
(EAIN) is pulled down by control IC and will remain low. The lower MOSFETs alone can not clamp the output
voltage however an SCR or N-MOSFET could be triggered with the OVP output to prevent load damage.
PWM Ramp
Every time the phase IC is powered up PWM ramp magnitude is calibrated to generate a 52.5 mV/%DC (typical)
ramp for a VCC=12V. For example, for a 15% duty ratio the ramp amplitude is 787.5mV for VCC=12V. Feed-
forward control is achieved because the PWM ramp varies with VCC voltage proportionally after calibration.
Debugging Mode
If CSIN+ pin is pulled up to VCCL voltage, IR3527 enters into debugging mode. Both drivers are pulled low and
ISHARE output is disconnected from the current share bus, which isolates this phase IC from other phases.
However, the phase timing from PHSIN to PHSOUT does not change.
FAULT LATCH
(CONTROL IC)
OUTPUT
VOLTAGE
ISHARE(IIN)
GATEH
GATEL
ERROR
AMPLIFIER
INPUT
(EAIN)
(VO)
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VCCL-800 mV
VDAC
OVP
THRESHOLD
Figure 7 - Over-voltage protection waveforms
NORMAL OPERATION
OVP CONDITION
V3.0
AFTER
OVP
IR3527