IR3527MTRPBF International Rectifier, IR3527MTRPBF Datasheet - Page 15
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IR3527MTRPBF
Manufacturer Part Number
IR3527MTRPBF
Description
IC CTRL XPHASE3 DUAL 24-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet
1.IR3527MTRPBF.pdf
(20 pages)
Specifications of IR3527MTRPBF
Applications
Processor
Current - Supply
8mA
Voltage - Supply
8 V ~ 28 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
*
Package
24-Lead MLPQ
Circuit
X-Phase Phase IC
Iout (a)
1.3A Gate Driver
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IR3527MTRPBF
Manufacturer:
IR
Quantity:
20 000
IC Die Temperature
To ensure proper operation, the IC die should never operate at or above 150° C. For the vast majority of
applications, the IR3527 dual phase IC will not require any type of heat sink to achieve temperatures well
below 150° C. The IR3527 die is housed in a 24 lead MLPQ with exposed pad (Epad) which will provide
excellent thermal conduction. By soldering the Epad to a minimal copper area of 1”x 1”, the internal die
temperature will rise at a rate of approximately 30.5
The die temperature can be derived by first calculating the power dissipation of the phase IC. The IC has two
types of conduction losses: quiescent current and driver losses. The quiescent losses are made up of VCC,
VCCL, and boost (V
The IC quiescent power losses can be calculated by the following equations:
supplies quiescent currents which are listed in the Electrical Specifications Table. Driver power losses (P
and P
operational frequency. Both top and bottom FET power losses needs to be calculated and doubled to account
for both internal drivers. Hence, the total phase IC power loss (P
2(P
The die temperature can now be calculated with the following formula:
Where, T
package.
Pvccl
BOT
BOT
).
Page 15 of 20
) are equal to Q
2
A
is the ambient temperature and
Vccl
u
Ivccl
BST
) supplies, while driving the top and bottom FETs contribute to the second loss.
G
,
x V
Pvcc
G
x Fo, where Q
Vcc
u
Ivcc
T
DIE
,
G
JA
and
is the FET’s gate charge, V
is the junction to air thermal impedance of the 24 pin MLPQ
T
Pbst
JA
u
P
TOTAL
( 2
JA
Vbst
).
TOTAL
T
u
A
Ibst
,
) is: P
)
. Ivccl, Ivcc, and Ibst are the input
G
VCCL
is the gate voltage, and Fo is the
+ P
VCC
+ P
BST
+ 2(P
IR3527
TOP
V3.0
) +
TOP