IR3084AMPBF International Rectifier, IR3084AMPBF Datasheet - Page 16

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IR3084AMPBF

Manufacturer Part Number
IR3084AMPBF
Description
IC XPHASE CONTROL 28-MLPQ
Manufacturer
International Rectifier
Series
XPhase™r
Datasheet

Specifications of IR3084AMPBF

Applications
Processor
Current - Supply
14mA
Voltage - Supply
9.5 V ~ 16 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
28-MLPQ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The IR3084A can accept changes in the VID code while operating and vary the DAC voltage accordingly. The
sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the
oscillator frequency. The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor
between VDAC pin and the VOSNS− pin. A resistor connected in series with this capacitor is required to
compensate the VDAC buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC
voltage and converter output voltage minimizing inrush currents in the input and output capacitors and overshoot
of the output voltage.
Adaptive Voltage Positioning
Adaptive Voltage Positioning (AVP) is needed to reduce the output voltage deviations during load transients and
the power dissipation of the load when it is drawing high current. The circuitry related to the voltage positioning is
shown in Figure 8.
Resistor R
voltage below the DAC voltage. The VSETPT is internally connected to the non−inverting input of the voltage
error amplifier and an internal current source I
that programs the oscillator frequency. The voltage drop across RSETPT caused by I
offset voltage below the nominal DAC setting.
The voltage at the VDRP pin is a buffered version of the share bus and represents the sum of the DAC voltage
and the average inductor current of all the phases. The VDRP pin is connected to the FB pin through the resistor
RDRP. Since the Error Amp will force the loop to maintain FB to be equal to the VSETPT reference voltage, a
current will flow into the FB pin equal to (VDRP−VSETPT) / R
voltage increases accordingly. More current flows through the feedback resistor R
voltage lower proportional to the load current. The positioning voltage can be programmed by the resistor R
so that the droop impedance produces the desired converter output impedance. The offset and slope of the
converter output impedance are referenced to and therefore independent of the VDAC voltage.
Due to the difference between VDAC and VSETPT, the VDRP will cause extra offset voltage through RDRP and
RFB. The total offset voltage is the sum of voltage across RVSETPT and the voltage drop on the RFB at no load.
Page 16 of 45
SETPT
is connected between the VDAC pin and VSETPT pin to set the desired amount of fixed offset
Control IC
IOFFSET
Error
Amplifier
VDRP
Amplifier
VDAC
+
-
-
+
Figure 8 − Adaptive voltage positioning
VDAC
VSETPT
VDRP
EAOUT
FB
IIN
OFFSET
RDRP
RSETPT
RFB
, whose value is programmed by the same external resistor
Vo
DRP
ISHARE
VDAC
ISHARE
ISHARE
ISHARE
ISHARE
VDAC
. When the load current increases, the VDRP
Phase IC
Phase IC
10k
10k
Current Sense
Amplifier
Current Sense
Amplifier
FB
OFFSET
, and makes the output
+
-
+
-
IR3084A
sets the no-load l
3/3/2009
CSIN+
CSIN-
CSIN+
CSIN-
DRP

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