ISL8724IRZ Intersil, ISL8724IRZ Datasheet - Page 3

IC POWER SUPPLY SEQUENCER 24QFN

ISL8724IRZ

Manufacturer Part Number
ISL8724IRZ
Description
IC POWER SUPPLY SEQUENCER 24QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL8724IRZ

Applications
Power Supply Sequencer
Voltage - Supply
2.5 V ~ 5 V
Current - Supply
270µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Input
-
Pin Descriptions
9, 11
PIN
18
13
22
#
3
4
2
5
6
7
DLY_OFF_C
DLY_OFF_D
DLY_OFF_A Gate Off Delay
DLY_OFF_B
No Connect
GATE_C
GATE_D
SYSRST
GATE_A
GATE_B
NAME
PIN
Timer Output
FET Gate Drive
Output
System Reset I/O
No Connect
FUNCTION
(Continued)
3
Allows for programming the delay and sequence for V
capacitor to ground. Each cap is charged with a 1µA internal current source to an internal reference
voltage causing the corresponding gate to be pulled down thus turning-off the FET.
Drives the external FETs with a 10µA current source to soft start ramp into the load. During sequence
off, 10µA is sunk from this pin to control the FET turn-off. During a turn-off due to a fault, the gate will
sink ~75mA to ensure a rapid turn-off.
As an input, allows for immediate and unconditional latch-off of all GATE outputs when driven low. This pin
can also be used to initiate the programmed sequence with ‘zero’ wait (no 10ms stabilization delay) from
input signal on this pin being driven high to first GATE.
As an output when there is a UV condition this pin pulls low. If common to other SYSRST pins in a multiple
IC configuration it will cause immediate and unconditional latch-off of all other GATEs on all other ISL872x
sequencers.
This pin is released to go high once all UVLO and enable conditions are satisfied and is pulled low
concurrent with the last GATE being turned off after EN disabled.
No Connect
ISL8723, ISL8724
DESCRIPTION
OUT
turn-off through ENABLE/ENABLE via a
April 22, 2009
FN6413.1

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