EMC1403-1-AIZL-TR SMSC, EMC1403-1-AIZL-TR Datasheet - Page 30

• Manufacturer Part Number: EMC1403-1-AIZL-TR
• Description: IC TEMP SESR TRIPLE 3.3V 10MSOP
• Manufacturer: SMSC

Specifications of EMC1403-1-AIZL-TR

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1068-2

ADDR
03h
09h
ADDR
02h
Revision 1.37 (01-06-10)
6.3
6.4
R/W
R/W
R/W
R
Configuration
REGISTER
The Status Register reports general error conditions. To identify specific channels, refer to
Section
cleared when the appropriate High Limit, Low Limit, or THERM Limit register has been read or cleared.
Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause either
the ALERT or THERM pins to be asserted.
Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit.
See the High Limit Status Register for specific channel information
will assert the ALERT pin.
Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low
limit. See the Low Limit Status Register for specific channel information
bit will assert the ALERT pin.
Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode
channels. See the External Diode Fault Register for specific channel information
set, this bit will assert the ALERT pin.
Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed
THERM limit. See the THERM Limit Status Register for specific channel information
When set, this bit will assert the THERM pin.
The Configuration Register controls the basic operation of the device. This register is fully accessible
at either address.
Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.
Bit 6 - RUN / STOP - Controls Active/Standby modes.
Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.
Status Register
Configuration Register
REGISTER
‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT
pin will be asserted.
‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is
configured as a secondary THERM pin. The Status Registers will be updated normally.
‘0’ (default) - The device is in Active mode and converting on all channels.
‘1’ -The device is in Standby mode and not converting.
‘0’ (default) - The ALERT pin acts as described in
‘1’ - The ALERT pin acts in comparator mode as described in
MASK_ALL bit is ignored.
Status
6.10,
MASK_
Section
ALL
B7
BUSY
B7
6.15,
STOP
RUN/
B6
Table 6.4 Configuration Register
B6
Section
-
Table 6.3 Status Register
ALERT/
COMP
DATASHEET
B5
6.16, and
B5
-
30
RECD1
HIGH
B4
B4
Section
LOW
Section
RECD2
B3
6.17. The individual Status Register bits are
1°C Temperature Sensor with Beta Compensation
B3
FAULT
5.3.
B2
Section
RANGE
(Section
B2
(Section
THERM
5.3.2. In this mode the
B1
SMSC EMC1403 / EMC1404
6.15). When set, this bit
DAVG_
DIS
B1
(Section
6.16). When set, this
B0
-
(Section
APDD
6.10). When
B0
-
Datasheet
DEFAULT
6.17).
00h
DEFAULT
00h