EMC1403-1-AIZL-TR SMSC, EMC1403-1-AIZL-TR Datasheet - Page 35

IC TEMP SESR TRIPLE 3.3V 10MSOP

EMC1403-1-AIZL-TR

Manufacturer Part Number
EMC1403-1-AIZL-TR
Description
IC TEMP SESR TRIPLE 3.3V 10MSOP
Manufacturer
SMSC
Datasheet

Specifications of EMC1403-1-AIZL-TR

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1068-2

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1°C Temperature Sensor with Beta Compensation
Datasheet
SMSC EMC1403 / EMC1404
ADDR.
6.10
6.11
ADDR.
1Bh
1Fh
R/W
R/W
R-C
R/W
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the
Status Register to be set. This register is cleared when it is read.
Bit 3 - E3FLT - This bit is set if the External Diode 3 channel reported a diode fault.
Bit 2 - E2FLT - This bit is set if the External Diode 2 channel reported a diode fault.
Bit 1 - E1FLT - This bit is set if the External Diode 1 channel reported a diode fault.
The Channel Mask Register controls individual channel masking. When a channel is masked, the
ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The
channel mask does not mask the THERM pin.
Bit 3 - E3MASK - Masks the ALERT pin from asserting when the External Diode 3 channel is out of
limit or reports a diode fault.
Bit 2 - E2MASK - Masks the ALERT pin from asserting when the External Diode 2 channel is out of
limit or reports a diode fault.
Bit 1 - E1MASK - Masks the ALERT pin from asserting when the External Diode 1 channel is out of
limit or reports a diode fault.
Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out
of limit.
External Diode Fault Register
Channel Mask Register
‘0’ (default) - The External Diode 3 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 3 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The External Diode 2 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 2 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The External Diode 1 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.
‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
Diode Fault
REGISTER
REGISTER
Channel
External
Mask
B7
B7
-
-
Table 6.11 External Diode Fault Register
Table 6.12 Channel Mask Register
B6
B6
-
-
DATASHEET
B5
-
B5
-
35
B4
-
B4
-
MASK
E3FLT
B3
E3
B3
MASK
E2FLT
E2
B2
B2
MASK
E1
B1
E1FLT
B1
Revision 1.37 (01-06-10)
MASK
INT
B0
B0
-
DEFAULT
DEFAULT
00h
00h

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