EMC1403-1-AIZL-TR SMSC, EMC1403-1-AIZL-TR Datasheet - Page 41

• Manufacturer Part Number: EMC1403-1-AIZL-TR
• Description: IC TEMP SESR TRIPLE 3.3V 10MSOP
• Manufacturer: SMSC

Specifications of EMC1403-1-AIZL-TR

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1068-2

ADDR.
37h
1°C Temperature Sensor with Beta Compensation
Datasheet
SMSC EMC1403 / EMC1404
6.17
6.18
ADDR.
40h
R-C
R/W
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low
limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
The THERM Limit Status Register contains the status bits that are set when a temperature channel
THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register
is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the
temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status
bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all
individual channel THERM bits are cleared.
Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds it’s programmed THERM
Limit. When set, this bit will assert the THERM pin.
Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds it’s programmed THERM
Limit. When set, this bit will assert the THERM pin.
Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds it’s programmed THERM
limit. When set, this bit will assert the THERM pin.
Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds it’s programmed THERM limit.
When set, this bit will assert the THERM pin.
R/W
The Filter Configuration Register controls the digital filter on the External Diode 1 channel.
Bits 1-0 - FILTER[1:0] - Control the level of digital filtering that is applied to the External Diode
temperature measurements as shown in
filter behavior.
THERM Limit Status Register
Filter Control Register
R/W
REGISTER
THERM
Status
Limit
Section
Filter Control
REGISTER
5.3.2).
B7
-
Table 6.22 THERM Limit Status Register
Table 6.23 Filter Configuration Register
B6
-
B7
-
B5
-
DATASHEET
B6
-
Table
B4
-
41
B5
-
6.24. See
THERM
B4
B3
E3
-
Figure
B3
-
THERM
E2
B2
5.3and
B2
-
Figure 5.4
THERM
FILTER[1:0]
E1
B1
B1
Revision 1.37 (01-06-10)
for examples on the
B0
ITHERM
B0
DEFAULT
00h
DEFAULT
00h