ADT75ARMZ Analog Devices Inc, ADT75ARMZ Datasheet - Page 15
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ADT75ARMZ
Manufacturer Part Number
ADT75ARMZ
Description
IC TEMP SENSOR DGTL 12BIT 8-MSOP
Manufacturer
Analog Devices Inc
Type
HW Monitorsr
Datasheet
1.ADT75ARMZ.pdf
(24 pages)
Specifications of ADT75ARMZ
Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-55°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
No
Output Fan
No
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Ic Output Type
Digital
Sensing Accuracy Range
± 2°C
Supply Current
380µA
Supply Voltage Range
3V To 5.5V
Resolution (bits)
12bit
Sensor Case Style
MSOP
No. Of Pins
8
Msl
MSL 3 - 168 Hours
Temperature Sensor Function
Temp Sensor
Resolution
12b
Package Type
MSOP
Operating Temperature (min)
-55
Operating Temperature (max)
125C
Operating Temperature Classification
Military
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Table 11.
Bit
D0
Shutdown
D1
Cmp/Int
D2
OS/ALERT
D4:D3
Fault
Queue
D5
One-Shot
D6
Reserved
D7
OS/SMBus
Alert
Mode
T
This 16-bit read/write register stores the temperature hysteresis limit for the two interrupt modes. The temperature limit is stored in twos
complement format with the MSB being the temperature sign bit. When reading from this register the eight MSBs are read first and then
the eight LSBs are read. The default setting has the T
MSB
D15
0
T
This 16-bit read/write register stores the overtemperature limit value for the two interrupt modes. The temperature limit is stored in twos
complement format with the MSB being the temperature sign bit. When reading from this register, the eight MSBs are read first and then
the eight LSBs are read. The default setting has the T
MSB
D15
0
HYST
OS
Setpoint Register
Setpoint Register
D14
1
D14
1
Function
Shutdown Bit. Setting this bit to 1 puts the ADT75 into shutdown mode. All circuitry except the SMBus/I
down. To power up the part again, write 0 to this bit.
This bit selects between comparator and interrupt mode.
D1
0
1
This bit selects the output polarity of the OS/ALERT pin.
D2
0
1
These two bits set the number of overtemperature faults that occur before setting the OS/ALERT pin. This helps to avoid false
triggering due to temperature noise.
D [4:3]
00
01
10
11
One-shot Mode. Setting this bit puts the part into one-shot mode. In this mode, the part is normally powered down until a
0x04 is written to the address pointer register; then a conversion is performed, and the part returns to power down.
D5
0
1
Reserved. Write 0 to this bit.
Interrupt Mode Only. Enable SMBus alert function mode. This bit can enable the ADT75 to support the SMBus alert function
when the interrupt mode is selected (D1 = 1).
D7
0
1
Over Temperature Interrupt Modes
Comparator mode
Interrupt mode
OS/ALERT Pin Polarity
Active low
Active high
One-Shot Mode
Normal mode; powered up and converting every 100 ms
One-shot mode
OS/SMBus Alert Mode
Disable SMBus alert function. The OS/ALERT pin behaves as an OS pin when this bit status is selected.
Enable SMBus alert function.
D13
0
D13
0
Overtemperature Fault Queue
1 fault (Default)
2 faults
4 faults
6 faults
D12
0
D12
1
D11
1
D11
0
D10
0
D10
0
HYST
OS
limit at +80°C. The control register settings are the default settings on power up.
limit at +75°C. The control register settings are the default settings on power up.
D9
1
D9
0
Rev. A | Page 15 of 24
D8
1
D8
0
D7
0
D7
0
D6
0
D6
0
D5
0
D5
0
D4
0
D4
0
D3
N/A
D3
N/A
D2
N/A
D2
N/A
2
C interface is powered
D1
N/A
D1
N/A
ADT75
LSB
D0
N/A
LSB
D0
N/A