ADT7460ARQZ ON Semiconductor, ADT7460ARQZ Datasheet
ADT7460ARQZ
Specifications of ADT7460ARQZ
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ADT7460ARQZ Summary of contents
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ADT7460 R dBCOOL Remote Thermal Monitor and Fan Controller The ADT7460 dBCOOL controller is a thermal monitor and multiple PWM fan controller for noise−sensitive applications requiring active system cooling. It can monitor the temperature two remote sensor ...
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PWM1 PWM REGISTERS PWM2 AND CONTROLLERS PWM3 TACH1 TACH2 TACH3 TACH4 THERM V TO ADT7460 D1+ D1– D2+ D2– +2.5V IN BAND GAP TEMP SENSOR ABSOLUTE MAXIMUM RATINGS Parameter Positive Supply Voltage ( Voltage on ...
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PIN ASSIGNMENT Pin No. Mnemonic 1 SCL Digital Input (Open Drain). SMBus serial clock input. Requires SMBus pullup. 2 GND Ground Pin for the ADT7460 Power Supply. Can be powered by 3.3 V standby if monitoring in low ...
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ELECTRICAL CHARACTERISTICS T Parameter (Note 1) POWER SUPPLY Supply Voltage Supply Current TEMPERATURE−TO−DIGITAL CONVERTER Local Sensor Accuracy Resolution Remote Diode Sensor Accuracy Resolution Remote Sensor Source Current ANALOG−TO−DIGITAL CONVERTER (INCLUDING MUX AND ATTENUATORS) Total Unadjusted Error, TUE Differential ...
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ELECTRICAL CHARACTERISTICS Parameter (Note 1) DIGITAL INPUT LOGIC LEVELS (THERM) Input High Voltage Input Low Voltage DIGITAL INPUT CURRENT Input High Current Input Low Current Input Capacitance SERIAL BUS TIMING ...
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TYPICAL PERFORMANCE CHARACTERISTICS 15 10 DXP TO GND 5 0 –5 DXP TO V (3.3V) CC –10 –15 –20 1 3.3 10.0 30.0 LEAKAGE RESISTANCE (MΩ) Figure 3. Remote Temperature Error vs. Leakage Resistance 3 2 HIGH LIMIT 1 +3 ...
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TYPICAL PERFORMANCE CHARACTERISTICS 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50 1.45 1.40 2.6 2.5 Figure 9. Supply Current vs. Supply Voltage 16 20mV 10mV –2 60k 110k 1M 10M FREQUENCY ...
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Product Description The ADT7460 is a thermal monitor and multiple fan controller for any system requiring monitoring and cooling. The device communicates with the system via a serial System Management Bus (SMBus). The serial bus controller has an optional address ...
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ADT7460 Address Selection Pin 8 is the dual−function PWM3/ADDRESS ENABLE pin. If Pin 8 is pulled low on powerup, the ADT7460 reads the state of Pin 9 (TACH4/ADDRESS SELECT/THERM) to determine the ADT7460’s slave address. If Pin 8 is high ...
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V CC ADT7460 10kΩ 9 ADDR_SEL 8 PWM3/ADDR_EN ADDRESS = 0x2D Figure 15. SMBus Address 0x2D (Pin ADT7460 10kΩ 9 ADDR_SEL 8 NC PWM3/ADDR_EN DO NOT LEAVE ADDR_EN UNCONNECTED. CAN CAUSE UNPREDICTABLE ADDRESSES CARE SHOULD ...
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SCL SDA START BY MASTER SERIAL BUS ADDRESS Figure 17. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register When reading data from a register, there are two possibilities: ...
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SCL 0 10 SDA START BY MASTER SERIAL BUS ADDRESS Figure 18. Writing to the Address Pointer Register Only 1 SCL 0 10 SDA START BY MASTER SERIAL BUS ADDRESS Figure 19. Reading Data from a Previously Selected Register ...
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Master initiates a read operation and sends the alert response address (ARA = 0001 100). This is a general call address, which must not be used as a specific device address. 3. The device whose SMBALERT output is low ...
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Table 6. 10−Bit A/D Output Code vs. V Input Voltage (3 <0.0042 <0.0065 <0.0042 0.0065–0.0130 0.0042–0.0085 0.0130–0.0195 0.0085–0.0128 0.0195–0.0260 0.0128–0.0171 0.0260–0.0325 0.0171–0.0214 0.0325–0.0390 0.0214–0.0257 0.0390–0.0455 0.0257–0.0300 0.0455–0.0521 0.0300–0.0343 0.0521–0.0586 0.0343–0.0386 − − − 1.6675–1.6740 ...
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The input range of the ADC without the attenuators 2.25 V. Single−Channel ADC Conversion Setting Bit 6 of Configuration Register 2 (Reg. 0x73) places the ADT7460 into single−channel ADC conversion mode. In this mode, the ...
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To further reduce the effects of noise, digital filtering is performed by averaging the results of 16 measurement cycles. A remote temperature measurement takes nominally 25.5 ms. The results of remote temperature measurements are stored in 10−bit, ...
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Table 13. Temperature Measurement Limit Registers Register Description 0x4E Remote 1 temperature low limit 0x4F Remote 1 temperature high limit 0x50 Local temperature low limit 0x51 Local temperature high limit 0x52 Remote 2 temperature low limit 0x53 Remote 2 temperature ...
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Limits The fan TACH measurements are 16−bit results. The fan TACH limits are also 16 bits, consisting of a high byte and low byte. Since fans running under speed or stalled are normally the only conditions of interest, only ...
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Analog Monitoring Cycle Time The analog monitoring cycle begins when written to the start bit (Bit 0) of Configuration Register 1 (Reg. 0x40). The ADC measures each analog input in turn and, as each measurement is completed, ...
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SMBALERT Interrupt Behavior The ADT7460 can be polled for status SMBALERT interrupt can be generated for out−of−limit conditions important to note how the SMBALERT output and status bits behave when writing interrupt handler software. Figure 34 ...
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Enabling the SMBALERT Interrupt Output The SMBALERT interrupt function is disabled by default. Pin 5 or Pin 14 can be reconfigured as an SMBALERT output to signal out−of−limit conditions. Table 24. Configuration Register 4 (Reg. 0x7D) Pin No. Bit Setting ...
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If the THERM timer is read during a THERM assertion ♦ The contents of the timer are cleared. ♦ Bit 0 of the THERM timer is set to 1 (since a THERM assertion is occurring). ♦ The THERM timer increments ...
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THERM is asserting more frequently on an hourly basis. Alternatively BIOS level software can time−stamp when the system is powered on SMBALERT is generated due to the THERM limit being exceeded, another time−stamp can be taken. ...
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TACH/AIN TACH 4.7kΩ 3.3V ADT7460 470Ω PWM Figure 41. Driving a 3−Wire Fan Using an NPN Transistor Driving Two Fans from PWM3 Note that the ADT7460 has four TACH inputs available for fan speed measurement, but ...
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CH1 100mV CH2 5.00mV M 4.00ms T ć1.00000ms CH3 50.0mV CH4 50.0mV Figure 45. Fan Speed Sensing Waveform at TACH/AIN Pin Laying Out 2−Wire and 3−Wire Fans Figure 46 shows how to lay out a common circuit arrangement for 2−wire ...
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R1* TACH TACH R2* OUTPUT *SEE TEXT Figure 50. Fan with Strong TACH Pullup to > V Totem−Pole Output, Attenuated with R1/R2 Fan Speed Measurement The fan counter does not count the fan TACH output pulses directly because ...
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Fan Pulses per Revolution Different fan models can output either TACH pulses per revolution. Once the number of fan TACH pulses is determined, it can be programmed into the fan pulses per revolution register (Reg. ...
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Table 34. PWM1 to PWM3 Configuration (Reg. 0x5C to 0x5E) Bits Bit Mnemonic Description <4> INV 0 = logic high for 100% PWM duty cycle 1 = logic low for 100% PWM duty cycle PWM Drive Frequency The PWM drive ...
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XNOR Tree Test Mode The ADT7460 includes an XNOR tree test mode. This mode is useful for in−circuit test equipment at board−level testing. By applying stimulus to the pins included in the XNOR tree possible to detect opens ...
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Table 38. ADT7460 Registers Addr R/W Desc Bit 7 0x3F R Revision Number VER 0x40 R/W Config Register 0x41 R Interrupt Stat Reg 1 OOL 0x42 R Interrupt Stat Reg 2 D2 0x44 R/W 2.5 V Low ...
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Table 38. ADT7460 Registers Addr R/W Desc Bit 7 0x6A R/W Remote1 THERM 7 Limit 0x6B R/W Local THERM Limit 7 0x6C R/W Remote2 THERM 7 Limit 0x6D R/W Remote1 Local HYSR1 Hysteresis 0x6E R/W Remote2 Temp HYSR2 Hysteresis 0x6F ...
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Table 41. Fan Tachometer Reading Registers (Power−On Default = 0x00) Register Address R/W 0x28 Read−only TACH1 low byte. 0x29 Read−only TACH1 high byte. 0x2A Read−only TACH2 low byte. 0x2B Read−only TACH2 high byte. 0x2C Read−only TACH3 low byte. 0x2D Read−only ...
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Table 44. Register 0x36 — Dynamic T Bit No. Mnemonic R/W <0> CYR2 R/W MSB of 3−Bit Remote 2 Cycle Value. The other two bits of the code reside in Dynamic T Control Register 2 (Reg. 0x37). These three bits ...
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Table 45. Register 0x37 — Dynamic T Bit No. Mnemonic R/W <2:0> CYR1 R/W 3−Bit Remote 1 Cycle Value. These three bits define the delay time between making subsequent T MIN cycles. The system has associated thermal time constants that ...
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Table 46. Register 0x40 — Configuration Register 1 (Power−On Default = 0x00) Bit No. Mnemonic R/W <0> STRT R/W Logic 1 enables monitoring and PWM control outputs based on the limit settings programmed. Logic 0 disables monitoring and PWM control ...
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Table 48. Register 0x42 — Interrupt Status Register 2 (Power−On Default = 0x00) Bit No. Mnemonic R/W <0> RES Read−only Reserved for future use. <1> OVT Read−only A 1 indicates that one of the THERM overtemperature limits has been exceeded. ...
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Table 52. PWM Configuration Registers (Power−On Default = 0x62) Register Address R/W 0x5C R/W PWM1 configuration. 0x5D R/W PWM2 configuration. 0x5E R/W PWM3 configuration. 1. These registers become read−only when the Configuration Register 1 lock bit is set to 1. ...
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Table 55. Temp T /PWM Frequency Register Bits RANGE Bit No. Mnemonic R/W <2:0> FREQ R/W These bits control the PWMx frequency. <3> THRM R/W THRM = 1 causes the THERM pin (Pin 9) to assert low as an output ...
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Table 56. Register 0x62 — Enhanced Acoustics Register 1 (Power−On Default = 0x00) Bit No. Mnemonic R/W [2:0] ACOU R/W These bits select the ramp rate applied to the PWM1 output. Instead of PWM1 jumping instantaneously to its newly calculated ...
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Table 57. Register 0x63 — Enhanced Acoustics Register 2 (Power−On Default = 0x00) Bit No. Mnemonic R/W [2:0] ACOU3 R/W These bits select the ramp rate applied to the PWM3 output. Instead of PWM3 jumping instantaneously to its newly calculated ...
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Table 61. THERM Limit Registers (Note 1) Register Address R/W 0x6A R/W 0x6B R/W 0x6C R/W 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Further attempts to write to this register have ...
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Table 66. Remote 2 Temperature Offset Register (Power−On Default = 0x00) Register Address R/W 0x72 R/W <7:0> R/W 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Further attempts to write to this ...
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Table 69. Register 0x75 — Interrupt Mask Register 2 (Power−On Default = 0x00) Bit No. Mnemonic R/W 0 RES R/W Reserved for future use. 1 OVT Read−only A 1 masks SMBALERT for overtemperature THERM conditions. 2 FAN1 R ...
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Table 73. Register 0x79 — THERM Status Register (Power−On Default = 0x00) Bit No. Mnemonic R/W <7:1> TMR Read−only <0> ASRT/TMR0 Read−only Table 74. Register 0x7A — THERM Limit Register (Power−On Default = 0x00) Bit No. Mnemonic R/W <7:0> LIMT ...
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... ADT7460ARQZ −40°C to +120°C ADT7460ARQZ−REEL −40°C to +120°C ADT7460ARQZ−RL7 −40°C to +120°C †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *The “Z’’ suffix indicates Pb−Free part. ...
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