ISL8105BCBZ-T Intersil, ISL8105BCBZ-T Datasheet - Page 5

• Manufacturer Part Number: ISL8105BCBZ-T
• Description: IC PWM CTRLR BUCK 1PHASE 8-SOIC
• Manufacturer: Intersil

Specifications of ISL8105BCBZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 330kHz
• Duty Cycle: 100%
• Voltage - Supply: 6.5 V ~ 14.4 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 330kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Specifications
NOTE:
Functional Pin Description (SOIC, DFN)
BOOT (SOIC Pin 1, DFN Pin 1)
This pin provides ground referenced bias voltage to the
top-side MOSFET driver. A bootstrap circuit is used to create
a voltage suitable to drive an N-Channel MOSFET (equal to
V
respect to LX.
TGATE (SOIC Pin 2, DFN Pin 2)
Connect this pin to the gate of top-side MOSFET; it provides
the PWM-controlled gate drive. It is also monitored by the
adaptive shoot-through protection circuitry to determine
when the top-side MOSFET has turned off.
GND (SOIC Pin 3, DFN Pin 4)
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
BGATE/BSOC (SOIC Pin 4, DFN Pin 5)
Connect this pin to the gate of the bottom-side MOSFET; it
provides the PWM-controlled gate drive (from V
pin is also monitored by the adaptive shoot-through
protection circuitry to determine when the lower MOSFET
has turned off.
During a short period of time following Power-On Reset
(POR) or shut-down release, this pin is also used to
determine the current limit threshold of the converter.
Connect a resistor (R
“Overcurrent Protection (OCP)” on page 7 for equations. An
overcurrent trip cycles the soft-start function, after two
dummy soft-start time-outs. Some of the text describing the
BGATE function may leave off the BSOC part of the name,
when it is not relevant to the discussion.
VBIAS (SOIC Pin 5, DFN Pin 6)
This pin provides the bias supply for the ISL8105B, as well
as the bottom-side MOSFET's gate and the BOOT voltage
TGATE Sink Resistance
BGATE Source Resistance
BGATE Source Resistance
BGATE Sink Resistance
BGATE Sink Resistance
OVERCURRENT PROTECTION (OCP)
BSOC Current Source
3. Limits established by characterization and are not production tested.
BIAS
minus the on-chip BOOT diode voltage drop), with
PARAMETER
BSOC
) from this pin to GND. See
5
Recommended Operating Conditions, Unless Otherwise Noted. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested. (Continued)
R
R
R
SYMBOL
R
R
BG-SRCh
BG-SNKh
BG-SRCl
TG-SNKl
BG-SNKl
I
BSOC
BIAS
V
V
V
V
V
ISL8105BC; BGATE/BSOC Disabled
ISL8105BI; BGATE/BSOC Disabled
BIAS
BIAS
BIAS
BIAS
BIAS
). This
= 4.25V, 50mA Source Current
= 14.5V, 50mA Source Current
= 4.25V, 50mA Source Current
= 14.5V, 50mA Source Current
= 4.25V, 50mA Source Current
ISL8105B
TEST CONDITIONS
for the top-side MOSFET's gate. An internal 5V regulator will
supply bias if V
and BOOT will still be sourced by V
decoupled +5V or +12V supply to this pin.
FB (SOIC Pin 6, DFN Pin 8)
This pin is the inverting input of the internal error amplifier.
Use FB, in combination with the COMP/EN pin, to
compensate the voltage-control feedback loop of the
converter. A resistor divider from the output to GND is used
to set the regulation voltage.
COMP/EN (SOIC Pin 7, DFN Pin 9)
This is a multiplexed pin. During soft-start and normal converter
operation, this pin represents the output of the error amplifier.
Use COMP/EN, in combination with the FB pin, to compensate
the voltage-control feedback loop of the converter.
Pulling COMP/EN low (V
disable (shut-down) the controller, which causes the
oscillator to stop, the BGATE and TGATE outputs to be held
low, and the soft-start circuitry to re-arm. The external
pull-down device will initially need to overcome maximum of
5mA of COMP/EN output current. However, once the IC is
disabled, the COMP output will also be disabled, so only a
20µA current source will continue to draw current.
When the pull-down device is released, the COMP/EN pin
will start to rise at a rate determined by the 20µA charging up
the capacitance on the COMP/EN pin. When the COMP/EN
pin rises above the V
begin a new initialization and soft-start cycle.
LX (SOIC Pin 8, DFN Pin 10)
Connect this pin to the source of the top-side MOSFET and
the drain of the bottom-side MOSFET. It is used as the sink
for the TGATE driver and to monitor the voltage drop across
the bottom-side MOSFET for overcurrent protection. This pin
is also monitored by the adaptive shoot-through protection
BIAS
rises above 6.5V (but the BGATE/BSOC
DISABLE
MIN
19.5
18.0
DISABLE
trip point, the ISL8105B will
= 0.4V nominal) will
TYP
2.75
21.5
21.5
2.7
2.4
2.0
2.1
BIAS
). Connect a well
MAX
23.5
23.5
April 15, 2010
UNITS
FN6447.2
µA
µA
Ω
Ω
Ω
Ω
Ω