ISL8844AABZ Intersil, ISL8844AABZ Datasheet - Page 12

• Manufacturer Part Number: ISL8844AABZ
• Description: IC PWM CTRLR SGL-ENDED 8-SOIC
• Manufacturer: Intersil

Specifications of ISL8844AABZ

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 2MHz
• Duty Cycle: 50%
• Voltage - Supply: 9 V ~ 30 V
• Buck: Yes
• Boost: Yes
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 2MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The current sense signal at the end of the ON time for CCM
operation is:
V
where V
L
current at current limit. Equation 13 assumes the voltage
drop across the output rectifier is negligible.
Since the peak current limit threshold is 1.00V, the total
current feedback signal plus the external ramp voltage must
sum to this value when the output load is at the current limit
threshold.
V
Substituting Equations 12 and 13 into Equation 14 and
solving for R
R
Adding slope compensation is accomplished in the
ISL884xA using an external buffer transistor and the RTCT
signal. A typical application sums the buffered RTCT signal
with the current sense feedback and applies the result to the
CS pin as shown in Figure 6.
s
CS
e
CS
is the secondary winding inductance, and I
+
V
=
=
CS
N
------------------------ I
---------------------------------------------------------------------------------------------------------------------------------------------------- -
D f
-------------------------------
CS
S
⋅
=
N
⋅
sw
R
P
L
is the voltage across the current sense resistor,
1
CS
p
CS
⋅
V
⎛
⎜
⎝
yields
IN
O
⋅
+
⎛
⎜
⎜
⎝
ISL8840A, ISL8841A, ISL8842A, ISL8843A, ISL8844A, ISL8845A
1
-- -
----------------- - 1
π
(
------------------------------------------- -
1 D
1 D
+
–
–
0.5
) V
2L
–
⋅
12
s
⎞
⎟
⎟
⎠
O
+
1
⋅
------ -
N
N
f
sw
p
s
⋅
⎞
⎟
⎠
⎛
⎜
⎝
I
O
+
(
------------------------------------------- -
V
1 D
–
O
) V
2L
is the output
⋅
s
O
⋅
(EQ. 13)
(EQ. 15)
(EQ. 14)
f
sw
⎞
⎟
⎠
Assuming the designer has selected values for the RC filter
(R
to add the appropriate external ramp can be found by
superposition.
V
The factor of 2.05 in Equation 16 arises from the peak
amplitude of the sawtooth waveform on RTCT minus a
base-emitter junction drop. That voltage multiplied by the
maximum duty cycle is the voltage source for the slope
compensation. Rearranging to solve for R
The value of R
rescaled so that the current sense signal presented at the
CS pin is that predicted by Equation 13. The divider created
by R
R′
R
e
9
CS
6
=
=
and C
6
2.05D R
--------------------------- -
=
(
--------------------------------------------- -
and R
2.05D V
R
R
-------------------- - R
6
6
+
4
R
+
) placed on the CS pin, the value of R
R
⋅
9
V
9
R
–
R6
FIGURE 6. SLOPE COMPENSATION
9
C4
e
R9
6
makes this necessary.
9
CS
e
⋅
) R
⋅
determined in Equation 15 must be
CS
V
6
Ω
RTCT
CS
9
VREF
yields:
9
required
April 18, 2007
(EQ. 16)
(EQ. 17)
(EQ. 18)
FN6320.3