ISL6341ACRZ Intersil, ISL6341ACRZ Datasheet - Page 6

IC CTRLR SYNC BUCK PWM 10-TDFN

ISL6341ACRZ

Manufacturer Part Number
ISL6341ACRZ
Description
IC CTRLR SYNC BUCK PWM 10-TDFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6341ACRZ

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
660kHz
Duty Cycle
75%
Voltage - Supply
4.5 V ~ 14.4 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
10-TDFN Exposed Pad
Frequency-max
660kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6341ACRZ
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
ISL6341ACRZ
Quantity:
290
Pulling COMP/EN low (V
disable the controller, which causes the oscillator to stop, the
LGATE and UGATE outputs to be held low, and the soft-start
circuitry to re-arm. The external pull-down device will initially
need to overcome up to 5mA of COMP/EN output current.
However, once the IC is disabled, the COMP output will also
be disabled, so only a 20µA current source will continue to
draw current.
When the pull-down device is released, the COMP/EN pin will
start to rise, at a rate determined by the 20µA charging up the
capacitance on the COMP/EN pin. When the COMP/EN pin
rises above the V
new initialization and soft-start cycle.
LGATE/OCSET (Pin 4)
Connect this pin to the gate of the lower MOSFET; it provides
the PWM-controlled gate drive (from V
monitored by the adaptive shoot-through protection circuitry to
determine when the lower MOSFET has turned off.
During a short period of time following Power-On Reset
(POR) or shut-down release, this pin is also used to
determine the overcurrent threshold of the converter.
Connect a resistor (R
“Overcurrent Protection (OCP)” on page 8 for equations. See
Table 1 for summary of overcurrent responses. Some of the
text describing the LGATE function may leave off the
OCSET part of the name when it is not relevant to the
discussion.
PGOOD (Pin 10)
This output is an open-drain pull-down device that reflects
the state of the PGOOD comparators. An external pull-up
resistor should be connected to a supply ≤6V. The output will
be held low through the soft-start ramp, and is allowed to go
high at the end of soft-start, if the VOS voltage is within its
window. The PGOOD window is tighter than the OV or UV
protection window, to give an early warning of a problem.
The PGOOD does respond directly to an OCP condition, but
may also go low if V
trip.
Figure 1 shows a simplified timing diagram. The
Power-On-Reset (POR) function continually monitors the
bias voltage at the VCC pin. Once the rising POR threshold
is exceeded (V
initiates the Overcurrent Protection (OCP) sample and hold
operation (while COMP/EN is ~1V). When the sampling is
complete, V
OUT
POR
begins the soft-start ramp.
ENABLE
OUT
= 4.3V nominal), the POR function
OCSET
ENABLE
drops low enough before an OCP
trip point, the ISL6341x will begin a
) from this pin to GND. See
6
= 0.7V nominal) will
ISL6341, ISL6341A, ISL6341B, ISL6341C
CC
). This pin is also
Functional Description
Initialization (POR and OCP Sampling)
If the COMP/EN pin is held low during power-up, that will just
delay the initialization until it is released and the COMP/EN
voltage is above the V
Figure 2 shows a typical power-up sequence in more detail.
The initialization starts at t0, when either V
V
COMP/EN will be pulled up by an internal 20µA current
source, but the timing will not begin until the COMP/EN
exceeds the V
capacitance of the disabling device, as well as the
compensation capacitors, will determine how quickly the
20µA current source will charge the COMP/EN pin. With
typical values, it should add a small delay compared to the
soft-start times. The COMP/EN will continue to ramp to ~1V.
ISL6341
ISL6341A
ISL6341B
ISL6341C
GND>
GND>
GND>
GND>
NUMBER
POR
PART
, or the COMP/EN pin is released (after POR). The
TABLE 1. SUMMARY OF FEATURE DIFFERENCES
FIGURE 1. POR AND SOFT-START OPERATION
(kHz)
f
300
600
600
300
SW
ENABLE
~4.3V POR
CYCLE
DUTY
MAX
(%)
85
75
75
85
ENABLE
trip point (at t1). The external
Latch off; toggle POR or COMP/EN
to restart
“Hiccup” mode (infinite retries)
Latch off; toggle POR or COMP/EN
to restart
“Hiccup” mode (infinite retries); UVP
is disabled
(OVERCURRENT PROTECTION)
COMP/EN (1V/DIV)
trip point.
CC
OCP
rises above
V
V
OUT
December 2, 2008
CC
(2V/DIV)
(1V/DIV)
FN6538.2

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