ISL6420IR Intersil, ISL6420IR Datasheet - Page 10

• Manufacturer Part Number: ISL6420IR
• Description: IC CTRLR PWM BUCK SYNC SGL 20QFN
• Manufacturer: Intersil

Specifications of ISL6420IR

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.4MHz
• Duty Cycle: 100%
• Voltage - Supply: 4.5 V ~ 16 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Frequency-max: 1.4MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pin Descriptions
VIN
This pin powers the controller and must be closely
decoupled to ground using a ceramic capacitor as close to
the VIN pin as possible.
SGND
This pin provides the signal and power ground for the IC. Tie
this pin to the ground plane through the lowest impedance
connection.
LGATE
This pin provides the PWM-controlled gate drive for the
lower MOSFET.
PHASE
This pin is the junction point of the output filter inductor, the
upper MOSFET source and the lower MOSFET drain. This
pin is used to monitor the voltage drop across the upper
MOSFET for overcurrent protection. This pin also provides a
return path for the upper gate drive.
UGATE
This pin provides the PWM-controlled gate drive for the
upper MOSFET.
BOOT
This pin powers the upper MOSFET driver. Connect this pin
to the junction of the bootstrap capacitor and the cathode of
the bootstrap diode. The anode of the bootstrap diode is
connected to the VCC5 pin.
FB
This pin is connected to the feedback resistor divider and
provides the voltage feedback signal for the controller. This
pin sets the output voltage of the converter.
COMP
This pin is the error amplifier output pin. It is used as the
compensation point for the PWM error amplifier.
PGOOD
This pin provides a power good status. It is an open collector
output used to indicate the status of the output voltage.
RT
This is the oscillator frequency selection pin. Connecting this
pin directly to VCC5 will select the oscillator free running
5.6V to 16V
5V +±10%
INPUT
TABLE 1. INPUT SUPPLY CONFIGURATION
Connect the input to the VIN pin. The VCC5
pin will provide a 5V output from the internal
LDO. Connect PVCC to VCC5.
Connect the input to the VCC5 pin. Connect
the PVCC and VIN pins to VCC5.
10
PIN CONFIGURATION
ISL6420
frequency of 300kHz. By placing a resistor from this pin to
GND, the oscillator frequency can be programmed from
100kHz to 1.4MHz. Figure 7 shows the oscillator frequency
vs. the RT resistance.
CDEL
The PGOOD signal can be delayed by a time proportional to
a CDEL current of 2µA and the value of the capacitor
connected between this pin and ground. A 0.1µF will
typically provide 125ms delay. When in the Voltage
Margining mode the CDEL current is 100µA typical and
provides the delay for the output voltage slew rate, 2.5ms
typical for the 0.1µF capacitor.
PGND
This pin provides the power ground for the IC. Tie this pin to
the ground plane through the lowest impedance connection.
PVCC
This pin is the power connection for the gate drivers.
Connect this pin to the VCC5 pin.
VCC5
This pin is the output of the internal 5V LDO. Connect a
minimum of 4.7µF ceramic decoupling capacitor as close to
the IC as possible at this pin. Refer to Table 1.
ENSS
This pin provides enable/disable function and soft-start for
the PWM output. The output drivers are turned off when this
pin is held below 1V.
OCSET
Connect a resistor (R
the drain of the upper MOSFET. R
current source (I
resistance r
point.
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
FIGURE 7. OSCILLATOR FREQUENCY vs. RT
0
DS(ON)
OCSET
25
set the converter overcurrent (OC) trip
OCSET
), and the upper MOSFET on
50
) and a capacitor from this pin to
RT (kΩ)
75
OCSET
100
, an internal 100µA
February 13, 2008
125
FN9151.5
150