ISL6529ACR Intersil, ISL6529ACR Datasheet

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ISL6529ACR

Manufacturer Part Number
ISL6529ACR
Description
IC CTRLR PWM DUAL REG 16-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6529ACR

Pwm Type
Voltage Mode
Number Of Outputs
2
Frequency - Max
650kHz
Duty Cycle
100%
Voltage - Supply
4.5 V ~ 13.2 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Frequency-max
650kHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Dual Regulator–Synchronous Rectified
Buck PWM and Linear Power Controller
The ISL6529A provides the power control and protection for
two output voltages in high-performance graphics cards and
other embedded processor applications. The dual-output
controller drives two N-Channel MOSFETs in a synchronous
rectified buck converter topology and one N-Channel
MOSFET in a linear configuration. The ISL6529A provides
both a regulated high current, low voltage supply and an
independent, lower current supply integrated in an 14-lead
SOIC package. The controller is ideal for graphic card
applications where regulation of both the graphics
processing unit (GPU) and memory supplies is required.
The synchronous rectified buck converter incorporates
simple, single feedback loop, voltage-mode control with fast
transient response. Both the switching regulator and linear
regulator provide a maximum static regulation tolerance of
±
ISL6529AC and
adjustable by means of external resistors.
An integrated soft-start feature brings both supplies into
regulation in a controlled manner. Each output is monitored
via the FB pins for undervoltage events. If either output drops
below 51.5% of the nominal output level, both converters are
shutdown.
Ordering Information
ISL6529ACB
ISL6529ACBZ
(See Note)
ISL6529ACR
ISL6529ACRZ
(See Note)
ISL6529EVAL1 Evaluation Board
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1%
NUMBER
PART
over
line, load, and temperature ranges for the
TEMP. RANGE (
±
2% for the ISL6529C. Each output is user-
0 to 70
0 to 70
0 to 70
0 to 70
®
1
o
C)
14 Ld SOIC
14 Ld SOIC
(Pb-free)
16 Ld 5x5 QFN L16.5x5B
16 Ld 5x5 QFN
(Pb-free)
Data Sheet
PACKAGE
M14.15
M14.15
L16.5x5B
DWG. #
PKG.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Features
• Provides two regulated voltages
• Both controllers drive low cost N-Channel MOSFETs
• 12V direct drive saves external components
• Small converter size
• Excellent output voltage regulation
• 5V down conversion
• PWM and linear output voltage range: down to 0.8V
• Simple single-loop voltage-mode PWM control design
• Fast PWM converter transient response
• Linear controller drives N-Channel MOSFET pass transistor
• Fully-adjustable outputs
• Undervoltage fault monitoring on both outputs
• QFN Package:
• Pb-Free Available (RoHS Compliant)
Applications
• Graphics–GPU and memory supplies
• ASIC power supplies
• Embedded processor and I/O supplies
• DSP supplies
Related Literature
• Technical Brief TB363 Guidelines for Handling and
December 28, 2004
- One synchronous rectified buck PWM controller
- One linear controller
- 600kHz constant frequency operation
- Small external component count
- Both outputs: ±1% over temperature - ISL6529AC
- Both outputs: ±2% over temperature - ISL6529C
- High-bandwidth error amplifier
- Full 0–100% duty ratio
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
- Near Chip Scale Package footprint, which improves
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
No Leads - Package Outline
PCB efficiency and has a thinner profile
All other trademarks mentioned are the property of their respective owners.
|
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
Intersil (and design) is a trademark of Intersil Americas Inc.
ISL6529A
FN9127.1

Related parts for ISL6529ACR

ISL6529ACR Summary of contents

Page 1

... ISL6529ACBZ SOIC (See Note) (Pb-free) ISL6529ACR 5x5 QFN L16.5x5B ISL6529ACRZ 5x5 QFN (See Note) (Pb-free) ISL6529EVAL1 Evaluation Board Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 2

Pinouts ISL6529A (SOIC) TOP VIEW 1 LGATE PGND 2 GND 3 5VCC 4 5 DRIVE2 FB2 INTERNAL CONNECTION 2 ISL6529A 14 UGATE 13 12VCC COMP ...

Page 3

Block Diagram VOLTAGE REFERENCE FB2 12VCC DRIVE2 EA2 INHIBIT SOFT-START GND 5VCC SHUTDOWN RESTART SOFT- START AND FAULT LOGIC INHIBIT SOFT-START +5VCC EA1 COMP1 OSCILLATOR UV1 UV2 FB COMP POWER-ON RESET (POR) 12VCC +5V UGATE GATE LOGIC PWM LGATE PGND ...

Page 4

Simplified Power System Diagram +V IN +12V +5V V OUT2 + Typical Application +V IN (+5V or +3.3V OUT2 2. OUT2 4 ISL6529A LINEAR Q3 CONTROLLER CONTROLLER ISL6529A + 5VCC 12VCC DRIVE2 ...

Page 5

Absolute Maximum Ratings UGATE, LGATE, DRIVE2 GND - 0.3V to 12VCC 5VCC . . . . . . . . . . . . . ...

Page 6

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System Diagrams, and Typical Application Schematic (Continued) PARAMETER PWM CONTROLLER GATE DRIVERS UGATE and LGATE Maximum Voltage UGATE and LGATE Minimum Voltage UGATE and LGATE Source ...

Page 7

NC (Pins 7, 8, 11, and 12), (Pins 11, 13 and 15 MLFP) No internal connection. FB (Pin 9), (Pin 9 MLFP) and COMP (Pin 10), (Pin 10 MLFP). FB and COMP are the available external pins ...

Page 8

CAPACITOR CURRENT CAPACITOR CURRENT FIGURE 2. TOP SCOPE TRACES ARE VOLTAGE RAMP AND CAPACITOR CURRENT. LOWER TRACES ARE TIME AND VOLTAGE EXPANSION OF UPPER SCOPE TRACES. Undervoltage Protection The FB and FB2 pins are monitored during converter operation by two ...

Page 9

However, since the value of R1 affects the values of the rest of the compensation components advisable to keep its value less than 5kΩ. Depending on the value chosen for R1, R4 can be calculated based on the ...

Page 10

V goal of component selection for the compensation network is to provide a loop gain with high 0dB crossing frequency (f ) and adequate phase margin. Phase margin is the 0dB difference between the ...

Page 11

A multi-layer printed circuit board is recommended. Figure 8 shows the connections of the critical components in the converter. Note that capacitors C and C IN represent numerous physical capacitors. Dedicate one solid layer, usually a middle layer of the ...

Page 12

The ripple voltage and current are approximated by the following equations – IN OUT OUT ∆I × ------------------------------- - --------------- - = × ...

Page 13

Ensure that the MOSFET is within its maximum junction temperature at high ambient temperature by calculating the temperature rise according to package thermal-resistance specifications. A separate heatsink may be necessary depending upon MOSFET power, package type, ambient temperature, air flow, ...

Page 14

... Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation ...

Page 15

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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