ISL6227CAZ-T Intersil, ISL6227CAZ-T Datasheet - Page 17

• Manufacturer Part Number: ISL6227CAZ-T
• Description: IC CONTROLLER DDR, DDR2 28QSOP
• Manufacturer: Intersil

Specifications of ISL6227CAZ-T

• Package / Case: 28-QSOP
• Mounting Type: Surface Mount
• Voltage - Output: 0.9 ~ 5.5 V
• Voltage - Input: 5 ~ 28 V
• Operating Temperature: -10°C ~ 100°C
• Applications: Controller, DDR, DDR2
• Number Of Outputs: 2
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The resistor connected to the ISEN pin sets the gain in the
current sensing. The following expression estimates the
required value of the current sense resistor, depending on
the maximum continuous load current, and the value of the
MOSFETs r
current.
Because the current sensing circuit is a sample-and-hold
type, the information obtained at the last moment of the
sampling is used. This current sensing circuit samples the
inductor current very close to its peak value. The current
feedback essentially injects a resistor R
original LC filter as shown in Figure 37, where the sample-
and-hold effect of the current loop has been ignored. Vc and
Vo are small signal components extracted from its DC
operation points.
The value of the injected resistor can be estimated by
Equation 7:
R
V
both channels in dual switcher applications, when V
above 3V. Refer to Table 1 for the ramp amplitude in different
V
reflected in Gm. V
voltage.
R
R
Ch1 and Ch2 Input Voltage
ramp
i
IN
FIGURE 37. THE EQUIVALENT CIRCUIT OF THE POWER
CS
i
output signal before the PWM comparator input. This
effectively creates an internal current control loop.
TABLE 1. PWM COMPARATOR RAMP AMPLITUDE FOR
is in kΩ, and R
=
pin connections. The feed-forward effect of the V
=
---------------- -
V
, is defined as Gm, which is a constant 8dB or 18dB for
Gm*Vc
V
ramp
I
----------------------------------------- -
MAX
IN
DS(ON)
--------------------------- - 4.4kΩ
R
75μA
•
DUAL SWITCHER APPLICATION
r
CS
DS ON
STAGE WITH CURRENT LOOP INCLUDED
GND
r
+
-
DS ON
(
+
(
DS
140
C
VIN PIN CONNECTIONS
, assuming the ISEN pin sources 75µA
Ri
)
is defined as the error amplifier output
)
and R
•
–
140Ω
CS
Input voltage >4.2V
Input voltage <4.2V
Lo
17
are in Ω . V
DCR
ESR
i
in series with the
Co
IN
divided by
Ro
AMPLITUDE
VRAMP
1.25V
1.25V
VIN/8
+
-
IN
Vo
IN
(EQ. 7)
(EQ. 6)
is
is
ISL6227
The small signal transfer function from the error amplifier
output voltage V
Equation 8:
The DC gain is derived by shorting the inductor and opening
the capacitor. There is one zero and two poles in this transfer
function. The zero is related to ESR and the output
capacitor.
The first pole is a low frequency pole associated with the
output capacitor and its charging resistors. The inductor can
be regarded as short. The second pole is the high frequency
pole related to the inductor. At high frequency the output
capacitor can be regarded as a short circuit. By
approximation, the poles and zero are inversely proportional
to the time constants, associated with inductor and capacitor,
by Equations 9, 10 and 11:
Since the current loop separates the LC resonant poles into
two distant poles, and ESR zero tends to cancel the high
frequency pole, the second order system behaves like a first
order system. This control method simplifies the design of
the internal compensator and makes it possible to
accommodate many applications having a wide range of
parameters.
The schematics for the internal compensator is shown in
Figure 38.
Wz
Wp1
Wp2
G s ( )
Ch1
Ch2
TABLE 2. PWM COMPARATOR RAMP VOLTAGE AMPLITUDE
=
=
=
=
----------------------- -
ESR*C
G
------------------------------------------------------------------------------ -
(
R
--------------------------------------------------------- -
Input Voltage
GND
Input voltage >4.2V
GND
ESR
m
i
1
+
DCR
---------------------------------------
R
FOR DDR APPLICATION
i
o
+
+
(
VIN PIN CONNECTION
DCR
R
c
L
+
R
i
to the output voltage V
o
+
ESR
o
DCR
1
+
R
Input voltage >4.2V
Input voltage <4.2V
||
o
) R
R
||
o
---------------------------------------------------------
⎛
⎝
------------ -
Wp1
o
s
)*C
⎛
⎝
+
-------- -
Wz
o
s
1
⎞
⎠
⎛
⎝
+
------------ -
Wp2
1
s
⎞
⎠
o
can be written in
+
1
⎞
⎠
AMPLITUDE
VRAMP
0.625V
August 7, 2007
1.25V
1.25V
1.25V
Vin/8
(EQ. 11)
(EQ. 8)
(EQ. 10)
FN9094.5
(EQ. 9)