ISL6227IAZ Intersil, ISL6227IAZ Datasheet - Page 13
![IC CONTROLLER DDR, DDR2 28QSOP](/photos/28/17/281740/28-qsop_m28_sml.jpg)
ISL6227IAZ
Manufacturer Part Number
ISL6227IAZ
Description
IC CONTROLLER DDR, DDR2 28QSOP
Manufacturer
Intersil
Datasheet
1.ISL6227CAZ.pdf
(27 pages)
Specifications of ISL6227IAZ
Applications
Controller, DDR, DDR2
Voltage - Input
5 ~ 28 V
Number Of Outputs
2
Voltage - Output
0.9 ~ 5.5 V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
28-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Block Diagram
SOFT1
ISEN1
BOOT1
UGATE1
PHASE1
PGND1
LGATE1
VCC
VSEN1
OCSET1
HYSTERETIC COMPARATOR 1
140Ω
MODE CHANGE COMP 1
+ 0.9V
CURRENT
REF
SAMPLE
300kΩ
OCSET1
1/2.9
500kΩ
PWM/HYS TRANSITION
ADAPTIVE DEAD-TIME
0.9V REFERENCE
V/I SAMPLE TIMING
DIODE EMULATION
REQUIRED TO CHANGE
PWM OR HYS MODE
SAME STATE FOR
8 CLOCK CYCLES
1.25pF
1MΩ
ERROR AMP 1
ΔV
CURRENT
HYS
SAMPLE
ISEN1
1/33.1
= 15mV
15pF
4.4kΩ
VOLTS/SEC
OVERCURRENT FAULT
CLAMP
REQUIRED TO LATCH
SAME STATE FOR
8 CLOCK CYCLES
PGOOD
OV UV
PG1
PWM1
OC1
EN1
DDR EN1 EN2
0
1
VOUT1
1
1
PWM CHANNEL PHASE CONTROL
DUTY CYCLE RAMP GENERATOR
1
1
VIN
OC1 DDR
4.2 < VIN < 28.0V
BIAS SUPPLIES
FAULT LATCH
REFERENCE
SOFT-START
VCC
DDR MODE
CONTROL
0V ⇔ 28.0V
ENABLE
VIN < 4.2
DDR
POR
VIN
GND
OC2
VCC
VOUT2
CH1/CH2 φ
OVERCURRENT FAULT
180°
REQUIRED TO LATCH
90°
SAME STATE FOR
8 CLOCK CYCLES
0°
EN2
OC2
DDR = 0
PWM2
PGOOD
REF/PG2
OV UV
VOLTS/SEC
CLAMP
DDR = 1
REQUIRED TO CHANGE
4.4kΩ
PWM OR HYS MODE
ΔV
SAME STATE FOR
8 CLOCK CYCLES
15pF
CURRENT
SAMPLE
HYS
ERROR AMP 2
PWM/HYS TRANSITION
ADAPTIVE DEAD-TIME
V/I SAMPLE TIMING
1/33.1
DIODE EMULATION
ISEN2
= 15mV
0.9V REFERENCE
1.25pF
1MΩ
BUFFER AMP
DDR VREF
HYSTERETIC COMPARATOR 2
500kΩ
MODE CHANGE COMP 2
+
OCSET2
1/2.9
(200kΩ, DDR = 1)
300kΩ
CURRENT
SAMPLE
+
DDR = 0
DDR = 0
140Ω
0.9V
REF
REFERENCE
DDR VTT
UGATE2
PHASE2
DDR = 1
LGATE2
SOFT2
OCSET2
BOOT2
PGND2
VSEN2
DDR = 1
ISEN2
VCC