MAX17082GTL+ Maxim Integrated Products, MAX17082GTL+ Datasheet - Page 43

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MAX17082GTL+

Manufacturer Part Number
MAX17082GTL+
Description
IC CTLR PWM DUAL IMVP-6.5 40TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17082GTL+

Applications
Controller, Intel IMVP-6.5™
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
 Details
When using low-capacity ceramic filter capacitors,
capacitor size is usually determined by the capacity
needed to prevent V
problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising load edge is no
longer a problem (see the V
in the Transient Response section).
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
where:
and:
where C
total equivalent series resistance, R
age-positioning gain, and R
resistance between the output capacitors and sense
resistors.
For a standard 300kHz application, the ESR zero fre-
quency must be well below 95kHz, preferably below
50kHz. Tantalum, SANYO POSCAP, and Panasonic SP
capacitors in widespread use at the time of publication
have typical ESR zero frequencies below 50kHz. In the
standard application circuit, the ESR needed to support
a 30mV
330μF/2.5V Panasonic SP (type SX) capacitors in paral-
lel provide 1.5mΩ (max) ESR. With a 2mΩ droop and
0.5mΩ PCB resistance, the typical combined ESR
results in a zero at 30kHz.
Ceramic capacitors have a high-ESR zero frequency,
but applications with significant voltage positioning can
take advantage of their size and low ESR. Do not put
high-value ceramic capacitors directly across the out-
put without verifying that the circuit contains enough
voltage positioning and series PCB resistance to
ensure stability. When only using ceramic output
capacitors, output overshoot (V
mines the minimum output capacitance requirement.
Output Capacitor Stability Considerations
P-P
OUT
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
R
ripple is 30mV/(40A x 0.3) = 2.5mΩ. Four
is the total output capacitance, R
EFF
= R
f
ESR
______________________________________________________________________________________
ESR
f
Dual-Phase, Quick-PWM Controllers for
ESR
=
SAG
+ R
R
and V
EFF OUT
f
DROOP
PCB
SAG
SW
π
1
C
SOAR
is the parasitic board
and V
SOAR
+ R
DROOP
) typically deter-
SOAR
PCB
from causing
is the volt-
equations
ESR
is the
Their relatively low capacitance value can cause output
overshoot when stepping from full-load to no-load con-
ditions, unless a small inductor value is used (high
switching frequency) to minimize the energy transferred
from inductor to capacitor during load-step recovery.
Unstable operation manifests itself in two related but
distinctly different ways: double pulsing and feedback-
loop instability. Double pulsing occurs due to noise on
the output or because the ESR is so low that there is not
enough voltage ramp in the output-voltage signal. This
“fools” the error comparator into triggering a new cycle
immediately after the minimum off-time period has
expired. Double pulsing is more annoying than harmful,
resulting in nothing worse than increased output ripple.
However, it can indicate the possible presence of loop
instability due to insufficient ESR. Loop instability can
result in oscillations at the output after line or load
steps. Such perturbations are usually damped, but can
cause the output voltage to rise above or fall below the
tolerance limits.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output-voltage-ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
The input capacitor must meet the ripple current
requirement (I
The multiphase Quick-PWM controllers operate out-of-
phase while the Quick-PWM slave controllers provide
selectable out-of-phase or in-phase on-time triggering.
Out-of-phase operation reduces the RMS input current
by dividing the input current between several stag-
gered stages. For duty cycles less than 100%/η
per phase, the I
by the following equation:
where η
switching regulators. The worst-case RMS current
requirement occurs when operating with V
fies to I
I
RMS
TOTAL
=
RMS
⎝ ⎜
V
TOTAL
η
OUT
TOTAL IN
I
LOAD
= 0.5 x I
. At this point, the above equation simpli-
RMS
V
is the total number of out-of-phase
RMS
) imposed by the switching currents.
⎠ ⎟
LOAD
requirements can be determined
Input Capacitor Selection
η
TOTAL OUT
TOTAL
V
.
(
V
IN
-
η
TOT
A A L OUT
V
OUTPH
IN
43
)
=

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