MAX17082GTL+ Maxim Integrated Products, MAX17082GTL+ Datasheet - Page 44

• Manufacturer Part Number: MAX17082GTL+
• Description: IC CTLR PWM DUAL IMVP-6.5 40TQFN
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX17082GTL+

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 4.5 ~ 5.5 V
• Number Of Outputs: 1
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Lead Free Status / Rohs Status: Details

Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
For most applications, nontantalum chemistries (ceram-
ic, aluminum, or OS-CON) are preferred due to their
resistance to inrush surge currents typical of systems
with a mechanical switch or connector in series with the
input. If the Quick-PWM controller is operated as the
second stage of a two-stage power-conversion system,
tantalum input capacitors are acceptable. In either con-
figuration, choose an input capacitor that exhibits less
than +10°C temperature rise at the RMS input current
for optimal circuit longevity.
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (> 20V) AC adapters. Low-
current applications usually require less attention.
The high-side MOSFET (N
the resistive losses plus the switching losses at both
V
Ideally, the losses at V
equal to losses at V
between. If the losses at V
er than the losses at V
size of N
Conversely, if the losses at V
higher than the losses at V
the size of N
V
power dissipation occurs where the resistive losses
equal the switching losses.
Choose a low-side MOSFET that has the lowest possible
on-resistance (R
package (i.e., one or two 8-pin SOs, DPAK, or D
and is reasonably priced. Make sure that the DL_ gate
driver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-
to-drain capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems might
occur (see the MOSFET Gate Drivers section).
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
case power dissipation due to resistance occurs at the
minimum input voltage:
where η
44
IN
IN(MIN)
PD N
does not vary over a wide range, the minimum
______________________________________________________________________________________
(
TOTAL
H
H
and V
Re
(reducing R
H
sistive
is the total number of phases.
(increasing R
IN(MAX)
DS(ON)
) =
MOSFET Power Dissipation
Power-MOSFET Selection
IN(MIN)
IN(MAX)
IN(MAX)
⎛
⎝ ⎜
DS(ON)
. Calculate both these sums.
), comes in a moderate-sized
V
OUT
V
H
IN(MIN)
IN
) must be able to dissipate
IN(MIN)
DS(ON)
⎞
⎠ ⎟ η
, consider increasing the
should be approximately
IN(MAX)
, with lower losses in
but with higher C
⎛
⎝ ⎜
I
are significantly high-
LOAD
TOTA
, consider reducing
to lower C
L L
are significantly
⎞
⎠ ⎟
H
2
), the worst-
R
DS ON
GATE
(
2
GATE
PAK),
)
). If
).
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
power dissipation often limits how small the MOSFET
can be. Again, the optimum occurs when the switching
losses equal the conduction (R
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side MOSFET
(N
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including verification
using a thermocouple mounted on N
where C
Q
MOSFET, and I
current (2.2A typ).
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied due to the squared term in the C x
V
MOSFET chosen for adequate R
voltages becomes extraordinarily hot when biased from
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
LOAD(MAX)
PD N
IN
IN(MAX)
G(SW)
PD N Switching
H
2
) due to switching losses is difficult since it must
(
x ƒ
(
L
H
Re
OSS
SW
is the charge needed to turn on the N
, consider choosing another MOSFET with
sistive
but are not quite high enough to exceed
switching-loss equation. If the high-side
is the N
GATE
DS(ON)
)
=
)
+
=
⎡
⎢1-
⎢ ⎢
⎣
is the peak gate-drive source/sink
C
H
⎛
⎜
⎝ ⎝
OSS IN SW
required to stay within package
V
⎛
⎜
⎝
MOSFET’s output capacitance,
IN MAX LOAD SW
V
IN MAX
(
V
V
2
OUT
(
η
TOTAL
2
L
)
f
), the worst-case power
I
)
DS(ON)
⎞
⎟
⎠
DS(ON)
⎤
⎥
⎥
⎦
⎛
⎝ ⎜
H
η
f
I
:
LOAD
TOTAL
) losses. High-
⎞
⎟
⎠
at low-battery
⎛
⎜
⎝
Q
I
⎞
⎠ ⎟
GATE
G SW
2
(
R
DS ON
)
(
⎞
⎟
⎠
)
H