ADP3157JR Analog Devices Inc, ADP3157JR Datasheet - Page 7

• Manufacturer Part Number: ADP3157JR
• Description: IC CNTRL SYNC PENTIUM III 16SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADP3157JR

• Rohs Status: RoHS non-compliant
• Applications: Controller, Intel Pentium® III
• Voltage - Input: 12V
• Number Of Outputs: 1
• Voltage - Output: 1.3 ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)

Power Good
The ADP3157 has an internal monitor that senses the output
voltage and drives the PWRGD pin of the device. This pin is an
open drain output whose high level (when connected to a pull-
up resistor) indicates that the output voltage has been within a
The PWRGD pin will go low if the output is outside the regula-
tion band for more than 500 s.
Output Crowbar
An added feature of using an N-channel MOSFET as the syn-
chronous switch is the ability to crowbar the output with the
same MOSFET. If the output voltage is 15% greater than the
targeted value, the ADP3157 will turn on the lower MOSFET,
which will current-limit the source power supply or blow its
fuse, pull down the output voltage, and thus save the micropro-
cessor from destruction. The crowbar function releases at ap-
proximately 50% of the nominal output voltage. For example, if
the output is programmed to 2.0 V, but is pulled up to 2.3 V or
above, the crowbar will turn on the lower MOSFET. If in this
case the output is pulled down to less than 1.0 V, the crowbar
will release, allowing the output voltage to recover to 2.0 V if
the fault condition has been removed.
Shutdown
The ADP3157 has a shutdown (SD) pin that is pulled down by
an internal resistor. In this condition the device functions nor-
mally. This pin should be pulled high to disable the output drives.
APPLICATION INFORMATION
Specifications for a Design Example
The design parameters for a typical 550 MHz Pentium III appli-
cation (Figure 2) are as follows:
Maximum output current:
Minimum output current:
Static tolerance of the supply voltage for the processor core:
Transient tolerance (for less than 2 s) of the supply voltage for
the processor core when the load changes between the minimum
and maximum values with a di/dt of 30 A/ s:
Input current di/dt when the load changes between the mini-
mum and maximum values: less than 8 A/ s
The above requirements correspond to Intel’s published power
supply requirements based on Intel Pentium III specifications.
C
The ADP3157 uses a constant-off-time architecture with t
determined by an external timing capacitor C
high side N-channel MOSFET switch turns on, the voltage
across C
REV. A
5% regulation band of the targeted value for more than 500 s.
T
Input voltage: V
Auxiliary input: V
Output voltage: V
I
I
OMAX
OMIN
V
V
V
V
Selection for Operating Frequency
OST+
OST–
OTR+
OTR–
= 1.0 A dc
T
= 17.0 A dc
= –70 mV
= –140 mV
= +70 mV
is reset to approximately 3.3 V. During the off time,
= +140 mV
f
MIN
IN
CC
O
= 5 V
t
OFF
= 2.0 V
1
= 12 V
V
IN
V
–
IN
I R
IN
–
I R
IN
IN
–
IN
I
OMAX
–
T
. Each time the
I
OMAX
(
R
DS ON HSF
(
(
R
DS ON HSF
)
(
OFF
)
R
–7–
SENSE
R
SENSE
C
reaches 2.3 V, a new on-time cycle is initiated. The value of the
off-time is calculated using the continuous-mode operating
frequency. Assuming a nominal operating frequency of f
200 kHz at an output voltage of 2.0 V, the corresponding off
time is:
The timing capacitor can be calculated from the equation:
The converter operates at the nominal operating frequency only
at the above specified V
heavy load, the operating frequency decreases due to the para-
sitic voltage drops across the power devices. The actual mini-
mum frequency at V
Equation 1), where:
I
R
R
R
R
R
C
The required ESR and capacitance drive the selection of the
type and quantity of the output capacitors. The ESR must be
small enough that both the resistive voltage deviation due to a
step change in the load current and the output ripple voltage
stay below the values defined in the specification of the supplied
microprocessor. The capacitance must be large enough that the
output is held up while the inductor current ramps up or down
to the value corresponding to the new load current.
The total static tolerance of the Pentium III processor is 140 mV.
Taking into account the 1% setpoint accuracy of the ADP3157,
and assuming a 0.5% (or 10 mV) peak-to-peak ripple, the al-
lowed static voltage deviation of the output voltage when the
load changes between the minimum and maximum values is
90 mV. Assuming a step change of I = I
and allocating all of the total allowed static deviation to the
contribution of the ESR sets the following limit:
The output filter capacitor must have an ESR of less than 5.6 m .
One can use, for example, two SP-Type OS-CON capacitors
from Sanyo, with 2200 F capacitance, 7 V voltage rating, and
IN
IN
DS(ON)HSF
DS(ON)LSF
SENSE
L
T
OUT
is discharged by a constant current of 65 A. Once C
R
L
Selection–Determining the ESR
–
R
L
R
) –
R
DS ON LSF
E MAX
(
(
V
is the input dc current
(assuming an efficiency of 90%, I
is the resistance of the input filter
(estimated value: 7 m )
is the resistance of the high side MOSFET
(estimated value: 10 m )
is the resistance of the low side MOSFET
(estimated value: 10 m )
is the resistance of the sense resistor
(estimated value: 5 m )
is the resistance of the inductor
(estimated value: 6 m )
O
)
t
OFF
)
C
)
OUT
T
ESR
180
OUT
= 2.0 V is calculated to be 180 kHz (see
t
OFF
1
–
MAX
kHz
and at light load. At higher V
V
1
V
V
IN
O
65
1
f
NOM
A
1
90
16
200
mV
A
3 0
OMAX
.
pF
ADP3157
s
5 6
–I
IN
.
OMIN
= 7.5 A)
m
= 16 A,
NOM
OUT
T
=
(1)
or