LTC1771IS8 Linear Technology, LTC1771IS8 Datasheet - Page 10

• Manufacturer Part Number: LTC1771IS8
• Description: IC CTRLR DC/DC STEPDOWN HE 8SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1771IS8

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.23 ~ 18 V
• Current - Output: 5A
• Voltage - Input: 2.8 ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Frequency - Switching: -

APPLICATIO S I FOR ATIO
3. I
4. The catch diode loss is proportional to the forward drop
Other losses including C
losses, and inductor core losses, generally account for
less than 2% total additional loss.
Output Voltage Programming
The output voltage is programmed with an external divider
from V
regulated voltage is determined by:
LTC1771
10
continuous mode, I
charge of the internal switch. Both the DC bias and gate
charge losses are proportional to V
effects will be more pronounced at higher supply
voltages.
tor and current sense resistor. In continuous mode the
average output current flows through L but is “chopped”
between the P-channel MOSFET in series with R
and the output diode. The MOSFET R
multiplied by the duty cycle can be summed with the
resistance of L to obtain I
as the diode conducts current during the off-time and is
more pronounced at high supply voltages where the
off-time is long. However, as discussed in the Catch
Diode section, diodes with lower forward drops often
have higher leakage currents, so although efficiency is
improved, the no-load supply current will increase. The
diode loss is calculated by multiplying the forward
voltage drop times the diode duty cycle multiplied by
the load current.
V
2
OUT
R losses are predicted from the internal switch, induc-
OUT
Figure 2. LTC1771 Adjustable Configuaration
1 23 1
to V
.
FB
LTC1771
U
(Pin 1) as shown in Figure 2. The
R
R
GATECHG
2
1
GND
V
FB
U
IN
2
R losses.
and C
V
= fQ
OUT
R2
R1
W
P
OUT
1771 F02
where Q
DS(ON)
IN
ESR dissipative
C
5pF
FF
and thus their
P
plus R
U
is the gate
SENSE
SENSE
To minimize no-load supply current, resistor values in the
megohm range should be used. The increase in supply
current due to the feedback resistors can be calculated
from:
A 5pF feedforward capacitor across R2 is recommended
to minimize output voltage ripple in Burst Mode operation.
Run/Soft-Start Function
The RUN/SS pin is a dual purpose pin that provides the
soft- start function and a means to shut down the LTC1771.
Soft-start reduces the input surge current from V
gradually increasing the internal current limit. Power
supply sequencing can also be accomplished using
this pin.
An internal 1 A current source charges up an external
capacitor C
1V, the LTC1771 begins operating. As the voltage on the
RUN/SS continues to ramp from 1V to 2.2V, the internal
current limit is also ramped at a proportional linear rate.
The current limits begins near 40% maximum load at
V
2.2V. The output current thus ramps up slowly, reducing
the starting surge current required from the input power
supply. If the RUN/SS has been pulled all the way to
ground, there will be a delay before the current limit starts
increasing and is given by:
where I
puts the LTC1771 into a low quiescent current shutdown
(I
Foldback Current Limiting
As described in the Catch Diode Selection, the worst-case
dissipation for diode occurs with a short-circuit output,
when the diode conducts the current limit value almost
continuously. In most applications this will not cause
excessive heating, even for extended fault intervals. How-
ever, when heat sinking is at a premium or higher forward
voltage drop diodes are being used, foldback current
RUN/SS
Q
t
DELAY
< 2 A).
I
VIN
CHG
= 1V and ends at maximum load at V
SS
R
C
V
1
SS
. When the voltage on the RUN/SS reaches
OUT
1 A. Pulling the RUN/SS pin below 0.5V
/I
R
CHG
2
V
V
OUT
IN
RUN/SS
IN
by
=