LTC1771IS8 Linear Technology, LTC1771IS8 Datasheet - Page 11

IC CTRLR DC/DC STEPDOWN HE 8SOIC

LTC1771IS8

Manufacturer Part Number
LTC1771IS8
Description
IC CTRLR DC/DC STEPDOWN HE 8SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1771IS8

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.23 ~ 18 V
Current - Output
5A
Voltage - Input
2.8 ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Frequency - Switching
-

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APPLICATIO S I FOR ATIO
limiting should be added to reduce the current in propor-
tion to the severity of the fault.
Foldback current limiting is implemented by adding two
diodes in series between the output and the I
shown in the Functional Diagram. In a hard short (V
0V) the current will be reduced to approximately 25% of
the maximum output current.
Minimum On-Time Considerations
Minimum on-time t
that the LTC1771 is capable of turning the top MOSFET on
and off again. It is determined by internal timing delays and
the amount of gate charge required to turn on the
P-channel MOSFET. Low duty cycle applications may
approach this minimum on-time limit and care should be
taken to ensure that:
where t
for the LTC1771.
As the on-time approaches t
remain in Burst Mode operation for an increasingly larger
portion of the load range (see Figure 3) and at or below
t
time. The output voltage will continue to be regulated, but
the ripple current and ripple voltage will increase.
ON(MIN)
t
ON
OFF
will remain in Burst Mode operation 100% of the
t
OFF
100
80
20
= 3.5 s and t
60
40
0
Figure 3. Burst Threshold vs On-Time
0
V
V
OUT
IN
0.5
ON(MIN)
U
V
OUT
V
ON-TIME ( s)
D
ON(MIN)
1.0
U
is the smallest amount of time
ON(MIN)
t
1.5
ON MIN
is generally about 0.4 s
(
W
2.0
, the LTC1771 will
)
1771 F03
2.5
U
TH
pin as
OUT
=
Mode Pin
Burst Mode operation is disabled by pulling MODE (Pin 8)
below 0.5V. Disabling Burst Mode operation provides a
low noise output spectrum, useful for reducing both audio
and RF interference. It does this by keeping the frequency
constant (for fixed V
(1% to 2% of I
voltage and current ripple at light loads. When Burst Mode
operation is disabled, efficiency is reduced at light loads
and no load supply current increases to 175 A.
Low Supply Operation
Although the LTC1771 can function down to 2.8V, the
maximum allowable output current is reduced when V
decreases below 3.2V. Figure 4 shows the amount of
change as the supply is reduced below 3.2V, where 100%
of maximum load equals 0.1/R
output current at V
same percentage as the current reduction in Figure 4.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1771. These items are also illustrated graphically in
the layout diagram of Figure 5. Check the following in your
layout:
1. Is the Schottky diode closely connected to the drain of
the external MOSFET and the input cap ground?
140
120
100
Figure 4. Maximum Load vs Input Voltage
80
60
40
20
0
2.5
MAX
3.0
IN
) and reducing the amount of output
IN
< 3.2V, simply lower R
INPUT VOLTAGE (V)
) down to much lower load current
3.5
4.0
SENSE
4.5
. To ensure adequate
1771 F04
LTC1771
5.0
SENSE
11
by the
IN

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