PM6675AS STMicroelectronics, PM6675AS Datasheet

IC CTLR STP DWN HE LDO VFQFPN24

PM6675AS

Manufacturer Part Number
PM6675AS
Description
IC CTLR STP DWN HE LDO VFQFPN24
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of PM6675AS

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
1.5V, 0.6 ~ 3.3 V
Current - Output
±1A, ±2A
Frequency - Switching
33kHz
Voltage - Input
4.5 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VFQFN, 24-VFQFPN
Power - Output
2.3W
For Use With
497-8426 - KIT EVAL PM6675S HE CTLR 2A REG497-8413 - BOARD EVAL BASED ON PM6675A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PM6675AS
Manufacturer:
STMicroelectronics
Quantity:
10 000
Features
Applications
Table 1.
February 2008
Switching section
– 4.5 V to 36 V input voltage range
– 0.6 V, ±1 % voltage reference
– Selectable 1.5 V fixed output voltage
– Adjustable 0.6 V to 3.3 V output voltage
– 1.237 V ±1 % reference voltage available
– Very fast load transient response using
– No R
– Negative current limit
– Latched OVP and UVP
– Soft-start internally fixed at 3 ms
– Selectable pulse skipping at light load
– Selectable No-audible (33 kHz) pulse skip
– Ceramic output capacitors supported
– Output voltage ripple compensation
– Output soft-end
LDO regulator section
– Adjustable 0.6 V to 3.3 V output voltage
– Selectable ±1 Apk or ±2 Apk current limit
– Dedicated power-good signal
– Ceramic output capacitors supported
– Output soft-end
Industrial application on 24 V
Graphic cards
Embedded computer systems
constant-on-time control loop
MOSFETs' R
mode
PM6675ASTR
Order codes
SENSE
PM6675AS
Device summary
current sensing using low side
DS(ON)
VFQFPN-24 4x4 (exposed pad)
Package
High efficiency step-down controller
Rev 1
with embedded 2 A LDO regulator
Description
The PM6675AS device consists of a single high
efficiency step-down controller and an
independent low drop-out (LDO) linear regulator.
The constant on-time (COT) architecture assures
fast transient response supporting both
electrolytic and ceramic output capacitors. An
embedded integrator control loop compensates
the DC voltage error due to the output ripple.
Selectable low-consumption mode allows the
highest efficiency over a wide range of load
conditions. The low-noise mode sets the minimum
switching frequency to 33 kHz for audio-sensitive
applications. The LDO linear regulator can sink
and source up to 2 Apk. Two fixed current limit
(±1 A- ±2 A) can be chosen.
An active soft-end is independently performed on
both the switching and the linear regulators
outputs when disabled.
VFQFPN-24 4x4
Tape and reel
PM6675AS
Packaging
Tube
www.st.com
1/48

Related parts for PM6675AS

PM6675AS Summary of contents

Page 1

... PM6675ASTR February 2008 High efficiency step-down controller with embedded 2 A LDO regulator Description The PM6675AS device consists of a single high efficiency step-down controller and an independent low drop-out (LDO) linear regulator. The constant on-time (COT) architecture assures fast transient response supporting both electrolytic and ceramic output capacitors ...

Page 2

... Output ripple compensation and loop stability . . . . . . . . . . . . . . . . . . . . 19 Pulse-skip and no-audible pulse-skip modes . . . . . . . . . . . . . . . . . . . . . 24 Mode-of-operation selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Current sensing and current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 POR, UVLO and soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Switching section power-good signal . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Switching section output discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Reference voltage and bandgap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Switching section OV and UV protections . . . . . . . . . . . . . . . . . . . . . . . 30 PM6675AS ...

Page 3

... PM6675AS 7.1.12 7.2 LDO linear regulator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7.2.1 7.2.2 7.2.3 7.2.4 8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.1 External components selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 8.1.6 8.1.7 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Device thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 LDO section current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 LDO section soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 LDO section power-good signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 LDO section output discharge ...

Page 4

... IN3 IN2 IN2 HGATE HGATE PHASE PHASE 17 17 LGATE LGATE PM6675AS PM6675A PM6675A 19 19 CSNS CSNS 16 16 PGND PGND 9 9 VSNS VSNS SMPS PG SMPS PG BYP BYP BYP BOOT BOOT LIM LIM LIM PM6675AS SMPS SMPS OUT OUT OUT INT INT INT ...

Page 5

... PM6675AS 2 Pin settings 2.1 Connections Figure 2. Pin connection (through top view) NOSKIP NOSKIP NOSKIP LGND LGND LGND LFB LFB LFB PM6675A PM6675A PM6675A PM6675A PM6675AS LPG LPG LPG SGND SGND SGND AVCC AVCC AVCC Pin settings VCC VCC VCC LGATE LGATE ...

Page 6

... Switching Section power-good signal (open drain output). High when the switching regulator output voltage is within ± nominal value. Power ground for the switching section. Low-side gate driver output low-side gate driver supply. Bypass with a 100 nF capacitor to PGND. PM6675AS Function for details. ...

Page 7

... PM6675AS Table 2. Pin functions (continued) N° Pin 19 CSNS 20 PHASE 21 HGATE 22 BOOT 23 LIN 24 LOUT Current sense input for the switching section. This pin must be connected through a resistor to the drain of the synchronous rectifier (RDSon sensing) to set the current limit threshold. Switch node connection and return path for the high side gate driver. ...

Page 8

... AVCC V VCC 8/48 (1) Parameter = 25°C A Parameter Thermal resistance junction to ambient Storage temperature range Operating ambient temperature range Junction operating temperature range Parameter Input voltage range IC supply voltage IC supply voltage PM6675AS Value Unit -0 -0 -0.3 to 0 +0.3 VCC -0 0.3 AVCC -0 ...

Page 9

... PM6675AS 4 Electrical characteristics Table 6. Electrical characteristics ° °C , VCC = AVCC = +5 V, LIN = 1.5 V and LOUT= 0 not otherwise A (1) specified . Symbol Parameter Supply section Operating current I IN (Switching + LDO) I Operating current (switching Shutdown operating current SHDN AVCC Under Voltage Lockout upper threshold ...

Page 10

... CSNS HGATE high state (pullup) HGATE low state (pulldown) LGATE high state (pullup) LGATE low state (pulldown) SPG and LPG forced to 5 LPG,SINK SPG,SINK -1 mA < I < LDO -1 A < I < LDO PM6675AS Min Typ Max Unit µA 90 100 110 -6 6 100 mV 110 - ...

Page 11

... PM6675AS Table 6. Electrical characteristics (continued -25 ° °C , VCC = AVCC = +5 V, LIN = 1.5 V and LOUT= 0 not otherwise A (1) specified. Symbol Parameter LDO sink current limit I LDO,CL LDO source current limit I LDO input bias current, on LIN,BIAS LDO input bias current, off I LFB input bias current ...

Page 12

... Zero Crossing CSNS CSNS CSNS & Current & Current & Current Limit Limit Limit VREF VREF VREF COMP COMP COMP % % % Vr +10 Vr + SPG SPG SPG - - - + + + - - - % % % Vr -10 Vr -10 Vr -10 VSNS VSNS VSNS SDS SDS SDS adj adj adj fix fix fix PM6675AS ...

Page 13

... PM6675AS 6 Typical operating characteristics Figure 4. Efficiency vs output load F = 330 kHz VOUT=1 VIN = 24 V VOUT - Efficiency 100 0.001 0.010 0.100 Current [A] Figure 6. Switching frequency vs input voltage, VOUT = 1.5 V, IVOUT = 2 A, forced PWM mode SW Frequency VS Input Voltage 550 450 350 250 4 14 Voltage [V] Figure 8 ...

Page 14

... Figure 14. VOUT Load Transient (VIN = 24 V, LOAD = 0 A -> @2.5 A/µs). pulse-skip mode 14/48 Figure 11. VOUT = 1.5 V, VIN = load, Non-audible pulse-skip mode (33 kHz) Figure 13. LOUT turn on, VOUT in pulse-skip mode Figure 15. LOUT load transient (VIN = 24 V, LOAD = -1.5 A -> 1.5 A @2.5 A/µs). pulse-skip mode PM6675AS ...

Page 15

... PM6675AS Figure 16. VOUT and LOUT output voltages. VOUT soft-end. LOUT powered by an auxiliary rail Figure 18. UV protection, pulse-skip mode LOUT powered by an auxiliary rail Figure 20. VOUT current limit protection during a load transient ( @2.5A/µs) Typical operating characteristics Figure 17. VOUT and LOUT output voltages LOUT soft-end Figure 19 ...

Page 16

... Device description 7 Device description The PM6675AS combines a single high efficiency step-down controller and an independent Low Drop-Out (LDO) linear regulator in the same package. The switching controller section is a high-performance, pseudo-fixed frequency, Constant- On-Time (COT) based regulator specifically designed for handling fast load transient over a wide range of input voltage ...

Page 17

... PM6675AS The Off-Time duration is solely determined by the output voltage: when lower than the set value (i.e. the voltage at VSNS pin is lower than the internal reference = 0.6 V), the synchronous rectifier is turned off and a new cycle begins ( Figure 22. Inductor current and output voltage in steady state conditions ...

Page 18

... Figure 24 shows the simplified block diagram of the Constant-On-Time controller. The switching regulator of the PM6675AS owns a one-shot generator that turns on the high- side MOSFET when the following conditions are simultaneously satisfied: the PWM comparator is high (i.e. output voltage is lower than Vr = 0.6 V), the synchronous rectifier current is below the current limit threshold and the minimum off-time has expired ...

Page 19

... PM6675AS Figure 24. Switching section simplified block diagram 7.1.2 Output ripple compensation and loop stability The loop is closed connecting the center tap of the output divider (internally, when the fixed output voltage is chosen, or externally, using the VSEL pin in the adjustable output voltage mode). The feedback node is the negative input of the error comparator, while the positive input is internally connected to the reference voltage ( ...

Page 20

... The stability of the system depends firstly on the output capacitor zero frequency. The following condition must be satisfied: Equation 6 20/48 ∆ ∆ capacitor feeds the negative input of the PWM comparator, INT > × Zout π × I=g (V -Vr capacitor is usually enough to INT k × C ESR out PM6675AS FILT ...

Page 21

... PM6675AS where fixed design parameter (k > 3). It determinates the minimum integrator capacitor value: Equation 7 where µs is the integrator transconductance. If the ripple on the COMP pin is greater than the integrator 150 mV, the auxiliary capacitor C can be added the desired attenuation factor of the output ripple, C ...

Page 22

... The new closed-loop gain depends on C that: Equation 11 where: Equation 12 22/48 COMP PIN VOLTAGE ΔV V REF Δ RIPPLE R VESR ∆ order to ensure stability it must be verified INT g > INT ⋅ π ⋅ π out I=g (V -Vr − ESR L Vr ⋅ f Vout Z 1 ⋅ R TOT PM6675AS ...

Page 23

... PM6675AS and Equation 13 Moreover, the C INT Equation 14 where R is the sum of the ESR of the output capacitor and the equivalent ESR given by TOT the Virtual-ESR Network (R determines the minimum integrator capacitor value C Equation 15 The capacitor of the Virtual-ESR Network chosen as follow Equation 16 and R is calculated to provide the desired triangular ripple voltage: ...

Page 24

... Device description 7.1.3 Pulse-skip and no-audible pulse-skip modes High efficiency at light load conditions is achieved by PM6675AS entering the Pulse-Skip Mode (if enabled). At light load conditions the zero-crossing comparator truncates the low- side switch On-Time as soon as the inductor current becomes negative; in this way the comparator determines the On-Time duration instead of the output ripple (see Figure 27 ...

Page 25

... Some audio-noise sensitive applications cannot accept the switching frequency to enter the audible range as is possible in Pulse-Skip mode with very light loads. For this reason, the PM6675AS implements an additional feature to maintain a minimum switching frequency of 33 kHz despite of a slight efficiency loss. At very light load conditions, if any switching cycle has taken place within 30 µ ...

Page 26

... The VSEL pin is used to firstly decide between fixed preset or adjustable (user defined) output voltages. When the VSEL pin is connected the PM6675AS set the switching section output voltage to 1.5 V without the need of an external divider. Applications requiring different output voltages can be managed by PM6675AS simply setting the adjustable mode ...

Page 27

... R is the sensing device (R SENSE The PM6675AS provides also a fixed negative current limit to prevent excessive reverse inductor current when the switching section sinks current from the load in forced-PWM (3rd quadrant working conditions). This negative current limit threshold is measured between PHASE and PGND pins, comparing the drop magnitude on PHASE pin with an internal 110mV fixed voltage ...

Page 28

... MOSFETs (only if AVCC > 1 V). The soft-start allows a gradual increase of the internal current limit threshold during startup reducing the input/output surge currents. At the beginning of start-up, the PM6675AS current limit is set nominal value and the under voltage protection is disabled. Then, the current limit threshold is sequentially brought to 100 % in four steps of approximately 750 µ ...

Page 29

... PM6675AS Figure 32. Soft-start at heavy load (a) and short-circuit (b) condition, pulse-skip enabled 7.1.7 Switching section power-good signal The SPG pin is an open drain output used to monitor output voltage through VSNS (in fixed output voltage mode the soft-start timer has expired. The SPG signal is held low if the output voltage drops 10 % below or rises 10 % above the nominal regulated value ...

Page 30

... PHASE pins work respectively as supply and return path for the high-side driver, while the low-side driver is directly feed through VCC and PGND pins. An important feature of the PM6675AS gate drivers is the Adaptive Anti-Cross-Conduction circuitry, which prevents high-side and low-side MOSFETs from being turned on at the same time ...

Page 31

... Device thermal protection The internal control circuitry of the PM6675AS self-monitors the junction temperature and turns all outputs off when the 150 °C limit has been overran. This event causes the switching section to be immediately disabled and both switches to be opened. The controller performs a soft-end and both the outputs are eventually kept to ground, then the low side MOSFET is turned on when the voltage of the switching section is lower than 400 mV ...

Page 32

... For output voltages higher than 2 V, the maximum output current is limited as reported. 32/48 PM6675AS V LOUT LOUT Cc R19 C OUT LFB R20 LGND π ⊕ ⋅ Figure 35 ). PM6675AS +5V ±2A CL LILIM ±1A CL Figure 36 shows the maximum current that the LDO can PM6675AS = 200 kHz ...

Page 33

... PM6675AS Figure 36. LDO current limit setting 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.0 0.5 7.2.2 LDO section soft-start The LDO section soft-start is performed by clamping the current limit. During startup, the LDO current limit voltage is set and the output voltage increases linearly. When the output voltage rises above the nominal value, the current limit is released according to the LILIM pin setting ...

Page 34

... The following paragraphs will guide the user into a step-by-step design. 8.1 External components selection The PM6675AS employes a pseudo-fixed frequency, Constant On-Time (COT) controller as the core of the switching section. The switching frequency can be set by connecting an external divider to the VOSC pin. The voltage seen at this pin must be greater than 0.8 V and lower than order to take advantage of the internal block linearity ...

Page 35

... PM6675AS Equation 28 a Equation 28 b Referring to the typical application schematic (figs. 1 and 23), the final expression is then: Equation 29 Even if the switching frequency is theoretically independent from battery and output voltages, parasitic parameters involved in power path (like MOSFETs on-resistance and inductor DCR) introduce voltage drops responsible of a slight dependence on load current. ...

Page 36

... RMS LOAD , MAX = + PEAK LOAD , MAX = 400 kHz) sw Inductance Series (µH) MLC1538-102 1 MVR1261C-112 1.1 7443552100 1 HC8-1R2 1.2 PM6675AS V OUT the output voltage and OUT V ⋅ OUT MAX ∆ MAX 12 in order to assure thermal L,RMS ∆ MAX 2 not only in case of hard LPEAK +40° ...

Page 37

... PM6675AS In Pulse-Skip Mode, low inductance values produce a better efficiency versus load curve, while higher values result in higher full-load efficiency because of the smaller current ripple. 8.1.2 Input capacitor selection In a buck topology converter the current that flows through the input capacitor is pulsed and with zero average value ...

Page 38

... Equation 39 where V is the output capacitor voltage after the load transient and V f voltage before the load transient. 38/48 V RIPPLE , MAX ≤ ESR ∆ MAX 1 > ⋅ π ⋅ 2 ESR C out ⋅ LOAD , MAX C OUT , min − PM6675AS is the output capacitor i ...

Page 39

... PM6675AS In Table 13 some tested polymer capacitors are listed. Table 13. Evaluated output capacitors Manufacturer SANYO HITACHI 8.1.4 MOSFETs selection In SMPS converters, power management efficiency is a high level requirement, so the power dissipation on the power switches becomes an important factor in switches selection. Losses of high-side and low-side MOSFETs depend on their working condition. ...

Page 40

... STS25NH3LL 40 IRF7811 24 Type R (mΩ) DSon STS8DNH3LL 25 IRF7313 46 Rated reverse voltage ( conduction ⎞ V ⎟ ⋅ 2 OUT I ⎟ LOAD , MAX V ⎠ MAX as possible. When the high-side DSon / C where ISS RSS C Rated reverse voltage 0.069 0.011 0.054 Rated reverse Gate charge (nC) voltage ( PM6675AS . ( ...

Page 41

... PM6675AS 8.1.5 Diode selection A rectifier across the synchronous switch is recommended. The rectifier works as a voltage clamp across the synchronous rectifier and reduces the negative inductor swing during the dead time between turning the high-side MOSFET off and the synchronous rectifier on. ...

Page 42

... The stability of the system depends firstly on the output capacitor zero frequency. It must be verified that: Equation 48 42/48 calculation (typically +0.4 %/°C). DSon 110 NEG R DSon capacitor. INT Ton One-shot generator + PWM Comparator - VREF + Integrator C R INT INT > ⋅ Zout ⋅ π 2 PM6675AS VSNS VOUT Vr=0 out out ...

Page 43

... PM6675AS where free design parameter greater than unity (k > determinates the minimum integrator capacitor value C Equation 49 If the ripple on pin COMP is greater than the integrator output dynamic (150 mV), an additional capacitor C attenuation factor of the output ripple, select: Equation 50 In order to reduce noise on pin COMP, it’s possible to introduce a resistor R ...

Page 44

... ESR. A good trade-off is to consider an VERS equivalent ESR of 30-50 mΩ, even though the choice depends on inductor current ripple. Then choose R1 as follows: Equation 54 44/48 > ⋅ INT ⋅ VESR ⎛ ⎞ 1 ⎜ ⎜ ⎟ ⎟ ⋅ R π ⎝ ⎠ − R π PM6675AS ...

Page 45

... PM6675AS 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 46

... Package mechanical data Figure 41. Package dimensions 46/48 PM6675AS ...

Page 47

... PM6675AS 10 Revision history Table 19. Document revision history Date 19-Feb-2008 Revision 1 Initial release. Revision history Changes 47/48 ...

Page 48

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 48/48 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com PM6675AS ...

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