SI8452AA-B-IS1 Silicon Laboratories Inc, SI8452AA-B-IS1 Datasheet - Page 11

IC ISOLATOR 5CH 5.5V 16-SOIC

SI8452AA-B-IS1

Manufacturer Part Number
SI8452AA-B-IS1
Description
IC ISOLATOR 5CH 5.5V 16-SOIC
Manufacturer
Silicon Laboratories Inc
Series
ISOpror
Datasheet

Specifications of SI8452AA-B-IS1

Number Of Channels
5
Package / Case
16-SOIC (3.9mm Width)
Inputs - Side 1/side 2
3/2
Isolation Rating
1000Vrms
Voltage - Supply
2.7 V ~ 5.5 V
Data Rate
1Mbps
Propagation Delay
35ns
Output Type
Tri-State
Operating Temperature
-40°C ~ 125°C
Mounting Style
SMD/SMT
Propagation Delay Time
35 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Supply Current
6 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI8452AA-B-IS1
Manufacturer:
Silicon Labs
Quantity:
135
Table 4. Electrical Characteristics (Continued)
(V
Parameter
Si845xBx
Maximum Data Rate
Minimum Pulse Width
Propagation Delay
Pulse Width Distortion
|t
Propagation Delay Skew
Channel-Channel Skew
All Models
Output Rise Time
Output Fall Time
Common Mode Transient
Immunity at Logic Low Output
Enable to Data Valid
Enable to Data Tri-State
Start-up Time
Notes:
PLH
DD1
1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
2. t
3. See "3. Errata and Design Migration Guidelines" on page 26 for more details.
4. Start-up time is the time period from the application of power to valid data at the output.
= 3.3 V±10%, V
- t
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
the same supply voltages, load, and ambient temperature.
PHL
PSK(P-P)
|
3,4
is the magnitude of the difference in propagation delay times measured between different units operating at
DD2
3
= 3.3 V±10%, T
3
2
t
A
t
Symbol
PHL
PSK(P-P)
PWD
CMTI
= –40 to 125 ºC; applies to narrow and wide-body SOIC packages)
t
t
t
PSK
t
en1
en2
SU
, t
t
t
r
f
PLH
Test Condition
V
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 1
See Figure 1
I
C
C
= V
Rev. 1.3
L
L
= 15 pF
= 15 pF
DD
or 0 V
Min
3.0
0
Si8450/51/52/55
Typ
6.0
1.5
2.0
0.5
4.3
3.0
5.0
7.0
25
15
Max
150
6.0
9.5
2.5
3.0
1.8
6.1
4.3
8.0
9.2
40
kV/µs
Mbps
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
11

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