HCPL-4534 Avago Technologies US Inc., HCPL-4534 Datasheet - Page 12

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HCPL-4534

Manufacturer Part Number
HCPL-4534
Description
OPTOCOUPLER 2CH 1MBS 8-DIP
Manufacturer
Avago Technologies US Inc.
Datasheets

Specifications of HCPL-4534

Input Type
DC
Package / Case
8-DIP (0.300", 7.62mm)
Voltage - Isolation
3750Vrms
Number Of Channels
2, Unidirectional
Current - Output / Channel
8mA
Propagation Delay High - Low @ If
200ns @ 16mA
Current - Dc Forward (if)
25mA
Output Type
Open Collector
Mounting Type
Through Hole
Isolation Voltage
3750 Vrms
Maximum Forward Diode Current
16 mA
Output Device
Phototransistor
Configuration
2 Channel
Current Transfer Ratio
24 %
Maximum Baud Rate
1 MBps
Maximum Forward Diode Voltage
1.8 V
Maximum Reverse Diode Voltage
5 V
Maximum Input Diode Current
25 mA
Maximum Power Dissipation
45 mW
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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12
Notes:
10. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 V rms for 1 second (leakage detec-
11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥6000 V rms for 1 second (leakage detec-
12. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together.
13. Derate linearly above 90°C free-air temperature at a rate of 3.0 mW/ °C for the SOIC-8 package.
Figure 1. DC and pulsed transfer characteristics.
Figure 4. Current transfer ratio vs. temperature.
1. Each channel.
2. CURRENT TRANSFER RATIO is defined as the ratio of output collector current, I
3. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
4. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
5. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dV
6. The 1.9 k: load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
7. The 4.1 k: load represents 1 LSTTL unit load of 0.36 mA and the 6.1 kΩ pull-up resistor.
8. The frequency at which the ac output voltage is 3 dB below the low frequency asymptote.
9. Use of a 0.1 PF bypass capacitor connected between pins 5 and 8 is recommended.
10
1.0
0.9
0.8
0.7
0.6
pulse, V
is the maximum tolerable (negative) dV
in a Logic Low state (i.e., V
tion current limit, I
tion current limit, I
1.1
5
0
0
-60
T = 25°C
V
A
CC
NORMALIZED
I = 16 mA
V = 0.5 V
V
T = 25°C
-40
V
F
A
O
CC
CM
= 5.0 V
O
T
– OUTPUT VOLTAGE – V
A
, to assure that the output will remain in a Logic High state (i.e., V
= 5 V
-20
– TEMPERATURE – °C
HCPL-2530/0530
HCPL-2531/0531/4534/0534
0
I-O
I-O
10
20
≤5 PA).
≤5 PA).
40
O
< 0.8 V).
I = 5 mA
60
40 mA
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
F
80
20
100
CM
/dt on the falling edge of the common mode pulse signal, V
Figure 2. Current transfer ratio vs. input current.
Figure 5. Propagation delay vs. temperature.
2000
1500
1000
1.5
1.0
0.5
0.1
500
0
0
-60
I
T
F
A
– INPUT CURRENT – mA
I
HCPL-2530/0530 (R
HCPL-2531/0531/4534/0534
(R
-20
HCPL-2530/0530
HCPL-2531/0531/4534/0534
F
– TEMPERATURE – °C
= 16 mA, V
L
= 1.9 kΩ)
1
t
PLH
20
CC
NORMALIZED
I = 16 mA
V = 0.5 V
V
T = 25°C
F
t
A
O
O
CC
= 5.0 V
PHL
10
> 2.0 V). Common mode transient immunity in a Logic Low level
O
L
= 5 V
, to the forward LED input current, I
= 4.1 kΩ)
60
100
100
CM
Figure 3. Input current vs. forward voltage.
Figure 6. Logic high output current vs. tempera-
ture.
/dt on the rising edge of the common mode
0.001
1000
10
10
10
10
10
10
10
0.01
100
1.0
0.1
10
+4
+3
+2
+1
CM
-1
-2
0
-50
1.1
V
, to assure that the output will remain
F
I
V
F
– FORWARD VOLTAGE – VOLTS
O
= 0
-25
= V
1.2
T
V
A
+
F
CC
– TEMPERATURE – °C
I
F
F
0
, times 100%.
= 5.0 V
1.3
+25
1.4
T = 25°C
+50
A
1.5
+75 +100
1.6

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