APTS006A0X4-SRZ Lineage Power, APTS006A0X4-SRZ Datasheet - Page 15
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APTS006A0X4-SRZ
Manufacturer Part Number
APTS006A0X4-SRZ
Description
CONVER DC-DC 0.59 5.5V @ 6A SMD
Manufacturer
Lineage Power
Series
Pico TLynx™r
Type
Point of Load (POL) Non-Isolated with Remote On/Offr
Datasheet
1.APXS006A0X4-SRZ.pdf
(25 pages)
Specifications of APTS006A0X4-SRZ
Output
0.59 ~ 5.5V
Number Of Outputs
1
Power (watts)
33W
Mounting Type
Surface Mount
Voltage - Input
4.5 ~ 14V
Package / Case
10-SMD Module
1st Output
0.59 ~ 5.5 VDC @ 6A
Size / Dimension
0.48" L x 0.48" W x 0.29" H (12.2mm x 12.2mm x 7.3mm)
Power (watts) - Rated
33W
Operating Temperature
-40°C ~ 85°C
Efficiency
91%
Approvals
CSA, EN, UL, VDE
Output Current
6A
Input Voltage
4.5 to 14V
Screening Level
Industrial
Mounting Style
Surface Mount
Pin Count
10
Product
Non-Isolated / POL
Output Power
33 W
Input Voltage Range
4.5 V to 14 V
Output Voltage (channel 1)
0.59 V to 5.5 V
Output Current (channel 1)
6 A
Output Type
Non-Isolated
Output Voltage
0.59 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-
2nd Output
-
Lead Free Status / Rohs Status
Compliant
Other names
555-1146-2
CC109126034
CC109126034
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Data Sheet
November 22, 2010
Remote Sense feature is not being used, connect the
SENSE pin to the VOUT pin.
Figure 45. Circuit configuration for programming
output voltage using an external resistor.
Voltage Margining
Output voltage margining can be implemented in the
12V Pico TLynx
resistor, R
for margining-up the output voltage and by connecting
a resistor, R
for margining-down. Figure 46 shows the circuit
configuration for output voltage margining. The POL
Programming Tool, available at
www.lineagepower.com
section, also calculates the values of R
R
Please consult your local Lineage Power technical
representative for additional details.
Figure 46. Circuit Configuration for margining
Output voltage.
LINEAGE
margin-down
V
ON/OFF
IN
(+)
margin-up
POWER
for a specific output voltage and % margin.
MODULE
margin-down
GND
TM
, from the Trim pin to the ground pin
SENSE
6A modules by connecting a
TRIM
V
Trim
, from the Trim pin to output pin
Vo
GND
O
(+)
under the Design Tools
Rtrim
Q2
Q1
4.5 – 14Vdc input; 0.59Vdc to 5.5Vdc output; 6A output current
Rmargin-down
Rmargin-up
R
margin-up
tri m
12V Pico TLynx
and
LOAD
TM
Monotonic Start-up and Shutdown
The 12V Pico TLynx
start-up and shutdown behavior for any combination of
rated input voltage, output current and operating
temperature range.
Startup into Pre-biased Output
The 12V Pico TLynx
prebiased output as long as the prebias voltage is 0.5V
less than the set output voltage. Note that prebias
operation is not supported when output voltage
sequencing is used.
Output Voltage Sequencing
The 12V Pico TLynx
sequencing feature, EZ-SEQUENCE that enables
users to implement various types of output voltage
sequencing in their applications. This is accomplished
via an additional sequencing pin. When not using the
sequencing feature, either tie the SEQ pin to V
leave it unconnected.
When an analog voltage is applied to the SEQ pin, the
output voltage tracks this voltage until the output
reaches the set-point voltage. The final value of the
SEQ voltage must be set higher than the set-point
voltage of the module. The output voltage follows the
voltage on the SEQ pin on a one-to-one basis. By
connecting multiple modules together, multiple
modules can track their output voltages to the voltage
applied on the SEQ pin.
For proper voltage sequencing, first, input voltage is
applied to the module. The On/Off pin of the module is
left unconnected (or tied to GND for negative logic
modules or tied to V
that the module is ON by default. After applying input
voltage to the module, a minimum 10msec delay is
required before applying voltage on the SEQ pin. This
delay gives the module enough time to complete its
internal power-up soft-start cycle. During the delay
time, the SEQ pin should be held close to ground
(nominally 50mV ± 20 mV). This is required to keep the
internal op-amp out of saturation thus preventing
output overshoot during the start of the sequencing
ramp. By selecting resistor R1 (see fig. 47) according
to the following equation
the voltage at the sequencing pin will be 50mV when
the sequencing signal is at zero.
6A: Non-isolated DC-DC Power Modules
R
1
=
IN
TM
TM
TM
V
for positive logic modules) so
6A modules can start into a
6A modules include a
IN
6A modules have monotonic
24950
−
. 0
05
ohms,
IN
or
15